From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kumar Gala Date: Thu, 15 Jul 2010 00:05:35 -0500 Subject: [U-Boot] [PATCH] powerpc/p4080: Add setting of clock-frequency for clockgen node In-Reply-To: <1279170338-25813-3-git-send-email-galak@kernel.crashing.org> References: <1279170338-25813-1-git-send-email-galak@kernel.crashing.org> <1279170338-25813-2-git-send-email-galak@kernel.crashing.org> <1279170338-25813-3-git-send-email-galak@kernel.crashing.org> Message-ID: <1279170338-25813-4-git-send-email-galak@kernel.crashing.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On QorIQ CoreNet based devices we have a global clocking block. We want to keep track of SYSCLK frequency as it is what is used to derive all other frequencies in the SoC Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/fdt.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index b4354f9..932466e 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -403,6 +403,11 @@ void ft_cpu_setup(void *blob, bd_t *bd) "clock-frequency", bd->bi_brgfreq, 1); #endif +#ifdef CONFIG_FSL_CORENET + do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", + "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); +#endif + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); #ifdef CONFIG_MP -- 1.6.0.6