[U-Boot] [PATCH 2/3] OMAP3: SDRC: Introduce Numonyx DDR type

[Steve Sakoman <steve@sakoman.com>]

On Sun, 2010-10-10 at 01:13 +0200, Enric Balletbo i Serra wrote:
> Introduce Numonyx DDR timings and provide CONFIG_OMAP3_NUMONYX_DDR
> config options to allow for platform files to setup their timings.
> 
> Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
> ---
>  arch/arm/include/asm/arch-omap3/mem.h |   42 +++++++++++++++++++++++++++++++++
>  1 files changed, 42 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
> index a78cf9f..cb59588 100644
> --- a/arch/arm/include/asm/arch-omap3/mem.h
> +++ b/arch/arm/include/asm/arch-omap3/mem.h
> @@ -128,6 +128,44 @@ enum {
>  		(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) |	\
>  		(MICRON_TWTR_165 << 16))
>  
> +/* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
> + *   ACTIMA
> + *      TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 -> 6
> + *      TDPL (Twr) = 15/6 = 2.5 -> 3
> + *      TRRD = 12/6 = 2
> + *      TRCD = 22.5/6 = 3.75 -> 4
> + *      TRP  = 18/6 = 3
> + *      TRAS = 42/6 = 7
> + *      TRC  = 60/6 = 10
> + *      TRFC = 140/6 = 23.3 -> 24
> + *   ACTIMB
> + *	TWTR = 2
> + *	TCKE = 2
> + *	TXSR = 200/6 =  33.3 -> 34
> + *	TXP  = 1.0 + 1.1 = 2.1 -> 3
> + */
> +#define NUMONYX_TDAL_165   6
> +#define NUMONYX_TDPL_165   3
> +#define NUMONYX_TRRD_165   2
> +#define NUMONYX_TRCD_165   4
> +#define NUMONYX_TRP_165    3
> +#define NUMONYX_TRAS_165   7
> +#define NUMONYX_TRC_165   10
> +#define NUMONYX_TRFC_165  24
> +#define NUMONYX_V_ACTIMA_165 ((NUMONYX_TRFC_165 << 27) | \
> +		(NUMONYX_TRC_165 << 22) | (NUMONYX_TRAS_165 << 18) | \
> +		(NUMONYX_TRP_165 << 15) | (NUMONYX_TRCD_165 << 12) | \
> +		(NUMONYX_TRRD_165 << 9) | (NUMONYX_TDPL_165 << 6) | \
> +		(NUMONYX_TDAL_165))
> +
> +#define NUMONYX_TWTR_165   2
> +#define NUMONYX_TCKE_165   2
> +#define NUMONYX_TXP_165    3
> +#define NUMONYX_XSR_165    34
> +#define NUMONYX_V_ACTIMB_165 ((NUMONYX_TCKE_165 << 12) | \
> +		(NUMONYX_XSR_165 << 0)) | (NUMONYX_TXP_165 << 8) | \
> +		(NUMONYX_TWTR_165 << 16)

I think the parens in the above define aren't quite what you intended
(perhaps an extra close paren in the XSR term and a missing close paren
on the end of the define)

>  #ifdef CONFIG_OMAP3_INFINEON_DDR
>  #define V_ACTIMA_165 INFINEON_V_ACTIMA_165
>  #define V_ACTIMB_165 INFINEON_V_ACTIMB_165
> @@ -136,6 +174,10 @@ enum {
>  #define V_ACTIMA_165 MICRON_V_ACTIMA_165
>  #define V_ACTIMB_165 MICRON_V_ACTIMB_165
>  #endif
> +#ifdef CONFIG_OMAP3_NUMONYX_DDR
> +#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
> +#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
> +#endif
>  
>  #if !defined(V_ACTIMA_165) || !defined(V_ACTIMB_165)
>  #error "Please choose the right DDR type in config header"

If the above change is made, then:

Acked-by: Steve Sakoman <steve.sakoman@linaro.org>

Steve