From: Becky Bruce <beckyb@kernel.crashing.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH V3 1/6] tqm85xx: create fixed_sdram() to do sdram setup
Date: Fri, 17 Dec 2010 17:17:54 -0600 [thread overview]
Message-ID: <1292627879-9027-2-git-send-email-beckyb@kernel.crashing.org> (raw)
In-Reply-To: <1292627879-9027-1-git-send-email-beckyb@kernel.crashing.org>
Also, change this code to use phys_size_t instead of long int.
Using common naming for this function will enable us to use the common
initdram() for 85xx going forward. Other than the type change,
this is just a code rearrange.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
---
board/tqc/tqm85xx/sdram.c | 37 +++++++++++++++++++++++--------------
1 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c
index 503c5e5..260cd1c 100644
--- a/board/tqc/tqm85xx/sdram.c
+++ b/board/tqc/tqm85xx/sdram.c
@@ -65,6 +65,7 @@ sdram_conf_t ddr_cs_conf[] = {
#define N_DDR_CS_CONF (sizeof(ddr_cs_conf) / sizeof(ddr_cs_conf[0]))
int cas_latency (void);
+static phys_size_t sdram_setup(int);
/*
* Autodetect onboard DDR SDRAM on 85xx platforms
@@ -73,7 +74,26 @@ int cas_latency (void);
* so this should be extended for other future boards
* using this routine!
*/
-long int sdram_setup (int casl)
+phys_size_t fixed_sdram(void)
+{
+ int casl = 0;
+ phys_size_t dram_size = 0;
+
+ casl = cas_latency();
+ dram_size = sdram_setup(casl);
+ if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) {
+ /*
+ * Try again with default CAS latency
+ */
+ printf("Problem with CAS lantency, using default CL %d/10!\n",
+ CONFIG_DDR_DEFAULT_CL);
+ dram_size = sdram_setup(CONFIG_DDR_DEFAULT_CL);
+ puts(" ");
+ }
+ return dram_size;
+}
+
+static phys_size_t sdram_setup(int casl)
{
int i;
volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
@@ -376,8 +396,7 @@ long int sdram_setup (int casl)
phys_size_t initdram (int board_type)
{
- long dram_size = 0;
- int casl;
+ phys_size_t dram_size = 0;
#if defined(CONFIG_DDR_DLL)
/*
@@ -407,17 +426,7 @@ phys_size_t initdram (int board_type)
}
#endif
- casl = cas_latency ();
- dram_size = sdram_setup (casl);
- if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) {
- /*
- * Try again with default CAS latency
- */
- printf ("Problem with CAS lantency, using default CL %d/10!\n",
- CONFIG_DDR_DEFAULT_CL);
- dram_size = sdram_setup (CONFIG_DDR_DEFAULT_CL);
- puts (" ");
- }
+ dram_size = fixed_sdram();
return dram_size;
}
--
1.5.6.5
next prev parent reply other threads:[~2010-12-17 23:17 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-17 23:17 [U-Boot] [PATCH V3 00/06] Go to common initdram() on 85xx-based boards Becky Bruce
2010-12-17 23:17 ` Becky Bruce [this message]
2010-12-17 23:17 ` [U-Boot] [PATCH V3 2/6] mpc85xx/tlb.c: Allow platforms to specify wimge bits Becky Bruce
2010-12-17 23:17 ` [U-Boot] [PATCH V3 3/6] mpc85xx boards: initdram() cleanup/bugfix Becky Bruce
2010-12-17 23:17 ` [U-Boot] [PATCH V3 4/6] mpc85xx: rename sdram_init() lbc_sdram_init() Becky Bruce
2010-12-17 23:17 ` [U-Boot] [PATCH V3 5/6] 85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN Becky Bruce
2010-12-17 23:17 ` [U-Boot] [PATCH V3 6/6] MPC8xxx DDR: align informational prints Becky Bruce
2011-01-05 0:25 ` Kumar Gala
2011-01-05 0:25 ` [U-Boot] [PATCH V3 5/6] 85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN Kumar Gala
2011-01-05 0:25 ` [U-Boot] [PATCH V3 4/6] mpc85xx: rename sdram_init() lbc_sdram_init() Kumar Gala
2011-01-05 0:25 ` [U-Boot] [PATCH V3 3/6] mpc85xx boards: initdram() cleanup/bugfix Kumar Gala
2011-05-04 21:53 ` Wolfgang Denk
2011-06-01 20:31 ` Wolfgang Denk
2011-01-05 0:24 ` [U-Boot] [PATCH V3 2/6] mpc85xx/tlb.c: Allow platforms to specify wimge bits Kumar Gala
2010-12-21 17:52 ` [U-Boot] [PATCH V3 1/6] tqm85xx: create fixed_sdram() to do sdram setup Kumar Gala
2010-12-22 8:44 ` Stefan Roese
2011-01-05 0:24 ` Kumar Gala
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