[U-Boot] [PATCH 2/2] powerpc/fsl-pci: Use new find_hose_by_cfg_addr for FSL PCI dts fixup

[Kumar Gala <galak@kernel.crashing.org>]

Previously we passed in a specifically named struct pci_controller to
determine if we had setup the particular PCI bus.  Now we can search for
the struct so we dont have to depend on the name or the struct being
statically allocated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/include/asm/fsl_pci.h |   43 ++---------------------------------
 drivers/pci/fsl_pci_init.c         |    5 +++-
 2 files changed, 7 insertions(+), 41 deletions(-)

diff --git a/arch/powerpc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h
index dc5c579..ab0f3ee 100644
--- a/arch/powerpc/include/asm/fsl_pci.h
+++ b/arch/powerpc/include/asm/fsl_pci.h
@@ -29,8 +29,7 @@ int fsl_setup_hose(struct pci_controller *hose, unsigned long addr);
 int fsl_is_pci_agent(struct pci_controller *hose);
 void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data);
 void fsl_pci_config_unlock(struct pci_controller *hose);
-void ft_fsl_pci_setup(void *blob, const char *pci_compat,
-			struct pci_controller *hose, unsigned long ctrl_addr);
+void ft_fsl_pci_setup(void *blob, const char *compat, unsigned long ctrl_addr);
 
 /*
  * Common PCI/PCIE Register structure for mpc85xx and mpc86xx
@@ -203,54 +202,18 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
 }
 
 #define __FT_FSL_PCI_SETUP(blob, compat, num) \
-	ft_fsl_pci_setup(blob, compat, &pci##num##_hose, \
-			 CONFIG_SYS_PCI##num##_ADDR)
-
-#define __FT_FSL_PCI_DEL(blob, compat, num) \
-	ft_fsl_pci_setup(blob, compat, NULL, CONFIG_SYS_PCI##num##_ADDR)
+	ft_fsl_pci_setup(blob, compat, CONFIG_SYS_PCI##num##_ADDR)
 
 #define __FT_FSL_PCIE_SETUP(blob, compat, num) \
-	ft_fsl_pci_setup(blob, compat, &pcie##num##_hose, \
-			 CONFIG_SYS_PCIE##num##_ADDR)
-
-#define __FT_FSL_PCIE_DEL(blob, compat, num) \
-	ft_fsl_pci_setup(blob, compat, NULL, CONFIG_SYS_PCIE##num##_ADDR)
+	ft_fsl_pci_setup(blob, compat, CONFIG_SYS_PCIE##num##_ADDR)
 
-#ifdef CONFIG_PCI1
 #define FT_FSL_PCI1_SETUP __FT_FSL_PCI_SETUP(blob, FSL_PCI_COMPAT, 1)
-#else
-#define FT_FSL_PCI1_SETUP __FT_FSL_PCI_DEL(blob, FSL_PCI_COMPAT, 1)
-#endif
-
-#ifdef CONFIG_PCI2
 #define FT_FSL_PCI2_SETUP __FT_FSL_PCI_SETUP(blob, FSL_PCI_COMPAT, 2)
-#else
-#define FT_FSL_PCI2_SETUP __FT_FSL_PCI_DEL(blob, FSL_PCI_COMPAT, 2)
-#endif
 
-#ifdef CONFIG_PCIE1
 #define FT_FSL_PCIE1_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 1)
-#else
-#define FT_FSL_PCIE1_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 1)
-#endif
-
-#ifdef CONFIG_PCIE2
 #define FT_FSL_PCIE2_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 2)
-#else
-#define FT_FSL_PCIE2_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 2)
-#endif
-
-#ifdef CONFIG_PCIE3
 #define FT_FSL_PCIE3_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 3)
-#else
-#define FT_FSL_PCIE3_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 3)
-#endif
-
-#ifdef CONFIG_PCIE4
 #define FT_FSL_PCIE4_SETUP __FT_FSL_PCIE_SETUP(blob, FSL_PCIE_COMPAT, 4)
-#else
-#define FT_FSL_PCIE4_SETUP __FT_FSL_PCIE_DEL(blob, FSL_PCIE_COMPAT, 4)
-#endif
 
 #if defined(CONFIG_FSL_CORENET)
 #define FSL_PCIE_COMPAT	"fsl,p4080-pcie"
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index 5b34dcb..71ab02b 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -518,11 +518,14 @@ void fsl_pci_config_unlock(struct pci_controller *hose)
 #include <fdt_support.h>
 
 void ft_fsl_pci_setup(void *blob, const char *pci_compat,
-			struct pci_controller *hose, unsigned long ctrl_addr)
+			unsigned long ctrl_addr)
 {
 	int off;
 	u32 bus_range[2];
 	phys_addr_t p_ctrl_addr = (phys_addr_t)ctrl_addr;
+	struct pci_controller *hose;
+
+	hose = find_hose_by_cfg_addr((void *)(ctrl_addr));
 
 	/* convert ctrl_addr to true physical address */
 	p_ctrl_addr = (phys_addr_t)ctrl_addr - CONFIG_SYS_CCSRBAR;
-- 
1.7.2.3