[U-Boot] IXP42x patch series

[Michael Schwingen <michael@schwingen.org>]

Hi,

here is my IXP42x patch series, which brings my IXP boards back to life
after relocation was added.

Some comments:

I added the XScale sub-architecture to the MAINTAINERS list to get a better
overview which boards may still need work:
[PATCH 01/13] add XScale sub architecture (IXP/PXA) to board list

The NPE library needs a fix for B1 silicon - the special handling is only
needed for Rev.  A0, but the code treats everything *but* B0 as being the
old A0 silicon:
[PATCH 02/13] add support for IXP42x Rev. B1 and newer

The dvlhost board has a watchdog that needs to be triggered regularly:
[PATCH 03/13] trigger hardware watchdog in IXP42x serial driver

Rework the startup and timer code:
[PATCH 04/13] Fix IXP code to work after relocation was added:

make fails during depend pass in the NPE directory, due to missing include
files:
[PATCH 05/13] fix "depend" target in npe directory

Board updates:
[PATCH 06/13] update/fix AcTux1 board
[PATCH 07/13] update/fix AcTux2 board
[PATCH 08/13] update/fix AcTux3 board
[PATCH 09/13] update/fix AcTux4 board

These fixes should be OK (not sure about the environment location on IXDP425
- the old value is inside the monitor area, which seems to be wrong).  I do
not know if these should be committed, or should be left for the board
maintainers:
[PATCH 10/13] update/fix some more IXP42x boards (only compile tested)

Add one new board:
[PATCH 11/13] add dvlhost (dLAN 200 AV Wireless G) board

Add support for -ffunction-sections / --gc-sections. This cuts the size of
u-boot.bin from 288548 bytes down to 226820 bytes on AcTux-3, probably in
part due to unused code in the Intel NPE library.  I found no way to
implement this in board-specific parts, so I added a global option to enable
this:
[PATCH 12/13] add support for function-sections

Add support for MII links that run at fixed speed, without a PHY with
standard registers (ethernet switch on AcTux-2/AcTux-3, powerline modem on
dvlhost):
[PATCH 13/13] add support for fixed-speed MII ports (no standard PHY registers)

cu
Michael