[U-Boot] [PATCH 08/13] update/fix AcTux3 board

Michael Schwingen
2010-12-28T12:43:26Z

board/actux3/actux3.c | 27 +++++++++++++++------------
board/actux3/config.mk | 2 --
board/actux3/u-boot.lds | 45 ++++++++++++++++++++++++++++-----------------
include/configs/actux3.h | 23 +++++++++++++++++------
4 files changed, 60 insertions(+), 37 deletions(-)

diff --git a/board/actux3/actux3.c b/board/actux3/actux3.c
index 63bf365..8875148 100644
--- a/board/actux3/actux3.c
+++ b/board/actux3/actux3.c
@@ -43,6 +43,19 @@

DECLARE_GLOBAL_DATA_PTR;

+int board_early_init_f (void)
+{
+ /* CS1: IPAC-X */
+ *IXP425_EXP_CS1 = 0x94d10013;
+ /* CS5: Debug port */
+ *IXP425_EXP_CS5 = 0x9d520003;
+ /* CS6: Release/Option register */
+ *IXP425_EXP_CS6 = 0x81860001;
+ /* CS7: LEDs */
+ *IXP425_EXP_CS7 = 0x80900003;
+ return 0;
+}
+
int board_init (void)
{
gd->bd->bi_arch_number = MACH_TYPE_ACTUX3;
@@ -81,15 +94,7 @@ int board_init (void)
GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
*IXP425_GPIO_GPCLKR = 0x011001FF;

- /* CS1: IPAC-X */
- *IXP425_EXP_CS1 = 0x94d10013;
- /* CS5: Debug port */
- *IXP425_EXP_CS5 = 0x9d520003;
- /* CS6: Release/Option register */
- *IXP425_EXP_CS6 = 0x81860001;
- /* CS7: LEDs */
- *IXP425_EXP_CS7 = 0x80900003;
-
+ /* we need a minimum PCI reset pulse width after enabling the clock */
udelay (533);
GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_ETHRST);
@@ -138,9 +143,7 @@ u32 get_board_rev (void)

int dram_init (void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
return (0);
}

diff --git a/board/actux3/config.mk b/board/actux3/config.mk
index 88634f7..b98b909 100644
--- a/board/actux3/config.mk
+++ b/board/actux3/config.mk
@@ -1,5 +1,3 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
# include NPE ethernet driver
BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o

diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
index 497ab97..d2176ad 100644
--- a/board/actux3/u-boot.lds
+++ b/board/actux3/u-boot.lds
@@ -30,34 +30,29 @@ SECTIONS

. = ALIGN (4);
.text : {
- arch/arm/cpu/ixp/start.o (.text)
- lib/string.o (.text)
- lib/vsprintf.o (.text)
- arch/arm/lib/board.o (.text)
- common/dlmalloc.o (.text)
- arch/arm/cpu/ixp/cpu.o (.text)
+ arch/arm/cpu/ixp/start.o(.text*)
+ net/libnet.o(.text*)
+ board/actux3/libactux3.o(.text*)
+ arch/arm/cpu/ixp/libixp.o(.text*)
+ drivers/serial/libserial.o(.text*)

. = env_offset;
- common/env_embedded.o (.ppcenv)
-
- * (.text)
+ common/env_embedded.o(.ppcenv)
+ *(.text*)
}

. = ALIGN (4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
-
. = ALIGN (4);
.data : {
- *(.data)
+ *(.data*)
}
-
. = ALIGN (4);
.got : {
*(.got)
}
-
. =.;
__u_boot_cmd_start =.;
.u_boot_cmd : {
@@ -66,10 +61,26 @@ SECTIONS
__u_boot_cmd_end =.;

. = ALIGN (4);
- __bss_start =.;
- .bss (NOLOAD): {
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
*(.bss)
- . = ALIGN(4);
+ . = ALIGN(4);
+ _end = .;
}
- _end =.;
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
}
diff --git a/include/configs/actux3.h b/include/configs/actux3.h
index ad9173f..4b9b496 100644
--- a/include/configs/actux3.h
+++ b/include/configs/actux3.h
@@ -37,6 +37,7 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_BOARD_EARLY_INIT_F 1

/***************************************************************
* U-boot generic defines start here.
@@ -45,7 +46,6 @@

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-/* size in bytes reserved for initial data */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -83,8 +83,9 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_SYS_MEMTEST_END 0x00800000

-/* spec says 66.666 MHz, but it appears to be 33 */
-#define CONFIG_SYS_HZ 3333333
+/* timer clock - 2* OSC_IN system clock */
+#define CONFIG_IXP425_TIMER_CLK 66666666
+#define CONFIG_SYS_HZ 1000

/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
@@ -111,7 +112,7 @@
/* SDRAM settings */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x00000000
-#define CONFIG_SYS_DRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_BASE 0x00000000

/* 16MB SDRAM */
#define CONFIG_SYS_SDR_CONFIG 0x3A
@@ -121,6 +122,7 @@
#define CONFIG_SYS_DRAM_SIZE 0x01000000

/* FLASH organization */
+#define CONFIG_SYS_TEXT_BASE 0x50000000
#define CONFIG_SYS_MAX_FLASH_BANKS 1
/* max number of sectors on one chip */
#define CONFIG_SYS_MAX_FLASH_SECT 140
@@ -184,13 +186,15 @@
"npe_ucode=50040000\0" \
"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
"kerneladdr=50050000\0" \
+ "kernelfile=actux3/uImage\0" \
+ "rootfile=actux3/rootfs\0" \
"rootaddr=50170000\0" \
"loadaddr=10000\0" \
"updateboot_ser=mw.b 10000 ff 40000;" \
" loady ${loadaddr};" \
" run eraseboot writeboot\0" \
"updateboot_net=mw.b 10000 ff 40000;" \
- " tftp ${loadaddr} u-boot.bin;" \
+ " tftp ${loadaddr} actux3/u-boot.bin;" \
" run eraseboot writeboot\0" \
"eraseboot=protect off 50000000 50003fff;" \
" protect off 50006000 5003ffff;" \
@@ -200,6 +204,9 @@
" cp.b 16000 50006000 3a000\0" \
"eraseenv=protect off 50004000 50005fff;" \
" erase 50004000 50005fff\0" \
+ "updateucode=loady;" \
+ " era ${npe_ucode} +${filesize};" \
+ " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
"updateroot=tftp ${loadaddr} ${rootfile};" \
" era ${rootaddr} +${filesize};" \
" cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
@@ -210,7 +217,7 @@
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
- "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
"boot_flash=run flashargs addtty addeth;" \
" bootm ${kerneladdr}\0" \
@@ -218,4 +225,8 @@
" tftpboot ${loadaddr} ${kernelfile};" \
" bootm\0"

+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
#endif /* __CONFIG_H */
--
1.7.2.3