From: Michael Schwingen <michael@schwingen.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 06/13] update/fix AcTux1 board
Date: Tue, 28 Dec 2010 13:43:24 +0100 [thread overview]
Message-ID: <1293540211-3684-7-git-send-email-michael@schwingen.org> (raw)
In-Reply-To: <1293540211-3684-1-git-send-email-michael@schwingen.org>
Signed-off-by: Michael Schwingen <michael@schwingen.org>
---
board/actux1/actux1.c | 22 +++++++++++---------
board/actux1/config.mk | 2 -
board/actux1/u-boot.lds | 40 ++++++++++++++++++++++++++-----------
boards.cfg | 5 +++-
include/configs/actux1.h | 48 +++++++++++++++++++++++++++------------------
5 files changed, 73 insertions(+), 44 deletions(-)
diff --git a/board/actux1/actux1.c b/board/actux1/actux1.c
index 399be23..c56ec94 100644
--- a/board/actux1/actux1.c
+++ b/board/actux1/actux1.c
@@ -42,6 +42,17 @@
DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f (void)
+{
+ /* CS5: Debug port */
+ *IXP425_EXP_CS5 = 0x9d520003;
+ /* CS6: HwRel */
+ *IXP425_EXP_CS6 = 0x81860001;
+ /* CS7: LEDs */
+ *IXP425_EXP_CS7 = 0x80900003;
+ return 0;
+}
+
int board_init (void)
{
gd->bd->bi_arch_number = MACH_TYPE_ACTUX1;
@@ -61,13 +72,6 @@ int board_init (void)
GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
*IXP425_GPIO_GPCLKR = 0x011001FF;
- /* CS5: Debug port */
- *IXP425_EXP_CS5 = 0x9d520003;
- /* CS6: HwRel */
- *IXP425_EXP_CS6 = 0x81860001;
- /* CS7: LEDs */
- *IXP425_EXP_CS7 = 0x80900003;
-
udelay (533);
GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
@@ -116,9 +120,7 @@ u32 get_board_rev (void)
int dram_init (void)
{
- gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
return (0);
}
diff --git a/board/actux1/config.mk b/board/actux1/config.mk
index 88634f7..b98b909 100644
--- a/board/actux1/config.mk
+++ b/board/actux1/config.mk
@@ -1,5 +1,3 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
# include NPE ethernet driver
BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds
index 5c1ece7..8898c30 100644
--- a/board/actux1/u-boot.lds
+++ b/board/actux1/u-boot.lds
@@ -30,15 +30,15 @@ SECTIONS
. = ALIGN (4);
.text : {
- arch/arm/cpu/ixp/start.o(.text)
- lib/string.o(.text)
- lib/vsprintf.o(.text)
- arch/arm/lib/board.o(.text)
- common/dlmalloc.o(.text)
- arch/arm/cpu/ixp/cpu.o(.text)
+ arch/arm/cpu/ixp/start.o(.text*)
+ net/libnet.o(.text*)
+ board/actux1/libactux1.o(.text*)
+ arch/arm/cpu/ixp/libixp.o(.text*)
+ drivers/serial/libserial.o(.text*)
+
. = env_offset;
common/env_embedded.o(.ppcenv)
- * (.text)
+ *(.text*)
}
. = ALIGN (4);
@@ -47,7 +47,7 @@ SECTIONS
}
. = ALIGN (4);
.data : {
- *(.data)
+ *(.data*)
}
. = ALIGN (4);
.got : {
@@ -61,10 +61,26 @@ SECTIONS
__u_boot_cmd_end =.;
. = ALIGN (4);
- __bss_start =.;
- .bss (NOLOAD): {
+ .rel.dyn : {
+ __rel_dyn_start = .;
+ *(.rel*)
+ __rel_dyn_end = .;
+ }
+
+ .dynsym : {
+ __dynsym_start = .;
+ *(.dynsym)
+ }
+
+ .bss __rel_dyn_start (OVERLAY) : {
+ __bss_start = .;
*(.bss)
- . = ALIGN(4);
+ . = ALIGN(4);
+ _end = .;
}
- _end =.;
+ /DISCARD/ : { *(.dynstr*) }
+ /DISCARD/ : { *(.dynamic*) }
+ /DISCARD/ : { *(.plt*) }
+ /DISCARD/ : { *(.interp*) }
+ /DISCARD/ : { *(.gnu*) }
}
diff --git a/boards.cfg b/boards.cfg
index 94b8745..695baca 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -122,7 +122,10 @@ omap4_panda arm armv7 panda ti
omap4_sdp4430 arm armv7 sdp4430 ti omap4
s5p_goni arm armv7 goni samsung s5pc1xx
smdkc100 arm armv7 smdkc100 samsung s5pc1xx
-actux1 arm ixp
+actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
+actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8
+actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
+actux1_8_32 arm ixp actux1 - - actux1:FLASH1X8,RAM_32MB
actux2 arm ixp
actux3 arm ixp
actux4 arm ixp
diff --git a/include/configs/actux1.h b/include/configs/actux1.h
index 8886eff..2ffedf1 100644
--- a/include/configs/actux1.h
+++ b/include/configs/actux1.h
@@ -26,13 +26,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-/* 1: modified board with 32MB DRAM */
-#define CONFIG_ACTUX1_32MB 0
-/* 1: 2*2MB FLASH (standard) */
-#define CONFIG_ACTUX1_FLASH2X2 1
-/* 1: 1*8MB FLASH (upgraded boards) */
-#define CONFIG_ACTUX1_FLASH1X8 0
-
#define CONFIG_IXP425 1
#define CONFIG_ACTUX1 1
@@ -44,6 +37,7 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_BOARD_EARLY_INIT_F 1
/***************************************************************
* U-boot generic defines start here.
@@ -54,7 +48,6 @@
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
-/* size in bytes reserved for initial data */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -63,8 +56,8 @@
#include <config_cmd_default.h>
#define CONFIG_CMD_ELF
-#undef CONFIG_CMD_PCI
-#undef CONFIG_PCI
+//!#undef CONFIG_CMD_PCI
+//!#undef CONFIG_PCI
#define CONFIG_BOOTCOMMAND "run boot_flash"
/* enable passing of ATAGs */
@@ -94,8 +87,9 @@
#define CONFIG_SYS_MEMTEST_START 0x00400000
#define CONFIG_SYS_MEMTEST_END 0x00800000
-/* spec says 66.666 MHz, but it appears to be 33 */
-#define CONFIG_SYS_HZ 3333333
+/* timer clock - 2* OSC_IN system clock */
+#define CONFIG_IXP425_TIMER_CLK 66666666
+#define CONFIG_SYS_HZ 1000
/* default load address */
#define CONFIG_SYS_LOAD_ADDR 0x00010000
@@ -121,9 +115,9 @@
/* SDRAM settings */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x00000000
-#define CONFIG_SYS_DRAM_BASE 0x00000000
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#if CONFIG_ACTUX1_32MB
+#ifdef CONFIG_RAM_32MB
# define CONFIG_SYS_SDR_CONFIG 0x18
# define PHYS_SDRAM_1_SIZE 0x02000000
# define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
@@ -137,8 +131,11 @@
# define CONFIG_SYS_DRAM_SIZE 0x01000000
#endif
+
+
/* FLASH organization */
-#if CONFIG_ACTUX1_FLASH2X2
+#define CONFIG_SYS_TEXT_BASE 0x50000000
+#ifdef CONFIG_FLASH2X2
# define CONFIG_SYS_MAX_FLASH_BANKS 2
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT 40
@@ -146,7 +143,7 @@
# define PHYS_FLASH_2 0x50200000
# define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
#endif
-#if CONFIG_ACTUX1_FLASH1X8
+#ifdef CONFIG_FLASH1X8
# define CONFIG_SYS_MAX_FLASH_BANKS 1
/* max number of sectors on one chip */
# define CONFIG_SYS_MAX_FLASH_SECT 140
@@ -173,12 +170,16 @@
#define CONFIG_NET_MULTI 1
/* NPE0 PHY address */
#define CONFIG_PHY_ADDR 0
+/* NPE1 PHY address (HW Release E only) */
+#define CONFIG_PHY1_ADDR 1
/* MII PHY management */
#define CONFIG_MII 1
/* Number of ethernet rx buffers & descriptors */
#define CONFIG_SYS_RX_ETH_BUFFER 16
#define CONFIG_RESET_PHY_R 1
+#define CONFIG_HAS_ETH1 1
+
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
@@ -203,17 +204,19 @@
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
#define CONFIG_SYS_USE_PPCENV 1
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CONFIG_EXTRA_ENV_SETTINGS \
"npe_ucode=50040000\0" \
"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
"kerneladdr=50050000\0" \
+ "kernelfile=actux1/uImage\0" \
+ "rootfile=actux1/rootfs\0" \
"rootaddr=50170000\0" \
"loadaddr=10000\0" \
"updateboot_ser=mw.b 10000 ff 40000;" \
" loady ${loadaddr};" \
" run eraseboot writeboot\0" \
"updateboot_net=mw.b 10000 ff 40000;" \
- " tftp ${loadaddr} u-boot.bin;" \
+ " tftp ${loadaddr} actux1/u-boot.bin;" \
" run eraseboot writeboot\0" \
"eraseboot=protect off 50000000 50003fff;" \
" protect off 50006000 5003ffff;" \
@@ -223,6 +226,9 @@
" cp.b 16000 50006000 3a000\0" \
"eraseenv=protect off 50004000 50005fff;" \
" erase 50004000 50005fff\0" \
+ "updateucode=loady;" \
+ " era ${npe_ucode} +${filesize};" \
+ " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
"updateroot=tftp ${loadaddr} ${rootfile};" \
" era ${rootaddr} +${filesize};" \
" cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
@@ -233,7 +239,7 @@
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
" rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
- "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
"boot_flash=run flashargs addtty addeth;" \
" bootm ${kerneladdr}\0" \
@@ -241,4 +247,8 @@
" tftpboot ${loadaddr} ${kernelfile};" \
" bootm\0"
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
#endif /* __CONFIG_H */
--
1.7.2.3
next prev parent reply other threads:[~2010-12-28 12:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-28 12:43 [U-Boot] IXP42x patch series Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 01/13] add XScale sub architecture (IXP/PXA) to board list Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 02/13] add support for IXP42x Rev. B1 and newer Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 03/13] trigger hardware watchdog in IXP42x serial driver Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 04/13] Fix IXP code to work after relocation was added: - jump to real flash location after reset before turning off flash mirror - fix timer system to use HZ == 1000, remove broken interrupt-based code Michael Schwingen
2010-12-29 4:48 ` Mike Frysinger
2010-12-28 12:43 ` [U-Boot] [PATCH 05/13] fix "depend" target in npe directory Michael Schwingen
2010-12-28 12:43 ` Michael Schwingen [this message]
2010-12-28 12:43 ` [U-Boot] [PATCH 07/13] update/fix AcTux2 board Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 08/13] update/fix AcTux3 board Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 09/13] update/fix AcTux4 board Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 10/13] update/fix some more IXP42x boards (only compile tested) Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 11/13] add dvlhost (dLAN 200 AV Wireless G) board Michael Schwingen
2010-12-28 12:43 ` [U-Boot] [PATCH 12/13] add support for function-sections Michael Schwingen
2010-12-29 4:47 ` Mike Frysinger
2010-12-29 8:28 ` Michael Schwingen
2010-12-29 8:35 ` Mike Frysinger
2010-12-28 12:43 ` [U-Boot] [PATCH 13/13] add support for fixed-speed MII ports (no standard PHY registers) Michael Schwingen
2010-12-29 4:48 ` Mike Frysinger
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1293540211-3684-7-git-send-email-michael@schwingen.org \
--to=michael@schwingen.org \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox