From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?utf-8?Q?Beno=C3=AEt_Th=C3=A9baudeau?= Date: Tue, 14 Aug 2012 17:01:07 +0200 (CEST) Subject: [U-Boot] [PATCH] mx5/6 timer: Use defined CONFIG_SYS_MX*_CLK32 Message-ID: <1314655933.2403506.1344956467227.JavaMail.root@advansee.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Signed-off-by: Beno?t Th?baudeau Cc: Stefano Babic --- .../arch/arm/cpu/armv7/imx-common/timer.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git u-boot-4d3c95f.orig/arch/arm/cpu/armv7/imx-common/timer.c u-boot-4d3c95f/arch/arm/cpu/armv7/imx-common/timer.c index 1645ff8..ad67367 100644 --- u-boot-4d3c95f.orig/arch/arm/cpu/armv7/imx-common/timer.c +++ u-boot-4d3c95f/arch/arm/cpu/armv7/imx-common/timer.c @@ -44,7 +44,11 @@ static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR; #define GPTCR_FRR (1 << 9) /* Freerun / restart */ #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */ #define GPTCR_TEN 1 /* Timer enable */ -#define CLK_32KHZ 32768 /* 32Khz input */ +#if defined(CONFIG_MX51) || defined(CONFIG_MX53) +#define CLK_32KHZ CONFIG_SYS_MX5_CLK32 +#elif defined(CONFIG_MX6Q) +#define CLK_32KHZ CONFIG_SYS_MX6_CLK32 +#endif DECLARE_GLOBAL_DATA_PTR;