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From: Ondrej Kupka <ondra.cap@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] x86: turn off cache: set control register properly
Date: Fri, 30 Sep 2011 20:27:07 +0200	[thread overview]
Message-ID: <1317407227-8864-1-git-send-email-ondra.cap@gmail.com> (raw)

Bits should be ORed when they are supposed to be added together

Cc: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Ondrej Kupka <ondra.cap@gmail.com>
---
 arch/x86/cpu/start16.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 3d3017a..9dabff2 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -50,7 +50,7 @@ board_init16_ret:
 
 	/* Turn of cache (this might require a 486-class CPU) */
 	movl	%cr0, %eax
-	orl	$(X86_CR0_NW & X86_CR0_CD), %eax
+	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
 	movl	%eax, %cr0
 	wbinvd
 
-- 
1.7.4.1

             reply	other threads:[~2011-09-30 18:27 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-09-30 18:27 Ondrej Kupka [this message]
2011-09-30 20:24 ` [U-Boot] [PATCH] x86: turn off cache: set control register properly Marek Vasut
2011-09-30 20:56   ` Ondra Kupka
2011-09-30 21:01     ` Marek Vasut
2011-10-16  3:21 ` Graeme Russ

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