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* [U-Boot] [PATCH] mxc_spi: Round up clock divider
       [not found] <797579011.2281948.1344624706885.JavaMail.root@advansee.com>
@ 2012-08-10 18:51 ` Benoît Thébaudeau
  2012-08-11 10:37   ` Stefano Babic
  2012-08-20  7:54   ` Stefano Babic
  0 siblings, 2 replies; 4+ messages in thread
From: Benoît Thébaudeau @ 2012-08-10 18:51 UTC (permalink / raw)
  To: u-boot

Since the input frequency of the API is a maximum that should not be exceeded in
order for the devices to operate properly, the SPI clock divider should be
rounded up, not truncated.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
---
 .../drivers/spi/mxc_spi.c                          |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c u-boot-4d3c95f/drivers/spi/mxc_spi.c
index 2e15318..cf1462f 100644
--- u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c
+++ u-boot-4d3c95f/drivers/spi/mxc_spi.c
@@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 
 	clk_src = mxc_get_clock(MXC_CSPI_CLK);
 
-	div = clk_src / max_hz;
+	div = DIV_ROUND_UP(clk_src, max_hz);
 	div = get_cspi_div(div);
 
 	debug("clk %d Hz, div %d, real clk %d Hz\n",
@@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 	 * The following computation is taken directly from Freescale's code.
 	 */
 	if (clk_src > max_hz) {
-		pre_div = clk_src / max_hz;
+		pre_div = DIV_ROUND_UP(clk_src, max_hz);
 		if (pre_div > 16) {
 			post_div = pre_div / 16;
 			pre_div = 15;

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] mxc_spi: Round up clock divider
  2012-08-10 18:51 ` [U-Boot] [PATCH] mxc_spi: Round up clock divider Benoît Thébaudeau
@ 2012-08-11 10:37   ` Stefano Babic
  2012-08-11 14:23     ` Benoît Thébaudeau
  2012-08-20  7:54   ` Stefano Babic
  1 sibling, 1 reply; 4+ messages in thread
From: Stefano Babic @ 2012-08-11 10:37 UTC (permalink / raw)
  To: u-boot

On 10/08/2012 20:51, Beno?t Th?baudeau wrote:
> Since the input frequency of the API is a maximum that should not be exceeded in
> order for the devices to operate properly, the SPI clock divider should be
> rounded up, not truncated.
> 

Hi Beno?t,

> Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  .../drivers/spi/mxc_spi.c                          |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c u-boot-4d3c95f/drivers/spi/mxc_spi.c
> index 2e15318..cf1462f 100644
> --- u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c
> +++ u-boot-4d3c95f/drivers/spi/mxc_spi.c
> @@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
>  
>  	clk_src = mxc_get_clock(MXC_CSPI_CLK);
>  
> -	div = clk_src / max_hz;
> +	div = DIV_ROUND_UP(clk_src, max_hz);
>  	div = get_cspi_div(div);
>  
>  	debug("clk %d Hz, div %d, real clk %d Hz\n",
> @@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
>  	 * The following computation is taken directly from Freescale's code.
>  	 */
>  	if (clk_src > max_hz) {
> -		pre_div = clk_src / max_hz;
> +		pre_div = DIV_ROUND_UP(clk_src, max_hz);
>  		if (pre_div > 16) {
>  			post_div = pre_div / 16;
>  			pre_div = 15;
> 

Agree - do you also get a case where the divider was too low and the SPI
does not work or it was only examining the code ?

Acked-by: Stefano Babic <sbabic@denx.de>

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] mxc_spi: Round up clock divider
  2012-08-11 10:37   ` Stefano Babic
@ 2012-08-11 14:23     ` Benoît Thébaudeau
  0 siblings, 0 replies; 4+ messages in thread
From: Benoît Thébaudeau @ 2012-08-11 14:23 UTC (permalink / raw)
  To: u-boot

Hi Stefano,

On 08/11/2012 12:37, Stefano Babic wrote:
> On 10/08/2012 20:51, Beno?t Th?baudeau wrote:
> > Since the input frequency of the API is a maximum that should not
> > be exceeded in
> > order for the devices to operate properly, the SPI clock divider
> > should be
> > rounded up, not truncated.
> > 
> 
> Hi Beno?t,
> 
> > Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> > Cc: Wolfgang Denk <wd@denx.de>
> > Cc: Stefano Babic <sbabic@denx.de>
> > ---
> >  .../drivers/spi/mxc_spi.c                          |    4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c
> > u-boot-4d3c95f/drivers/spi/mxc_spi.c
> > index 2e15318..cf1462f 100644
> > --- u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c
> > +++ u-boot-4d3c95f/drivers/spi/mxc_spi.c
> > @@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave
> > *mxcs, unsigned int cs,
> >  
> >  	clk_src = mxc_get_clock(MXC_CSPI_CLK);
> >  
> > -	div = clk_src / max_hz;
> > +	div = DIV_ROUND_UP(clk_src, max_hz);
> >  	div = get_cspi_div(div);
> >  
> >  	debug("clk %d Hz, div %d, real clk %d Hz\n",
> > @@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave
> > *mxcs, unsigned int cs,
> >  	 * The following computation is taken directly from Freescale's
> >  	 code.
> >  	 */
> >  	if (clk_src > max_hz) {
> > -		pre_div = clk_src / max_hz;
> > +		pre_div = DIV_ROUND_UP(clk_src, max_hz);
> >  		if (pre_div > 16) {
> >  			post_div = pre_div / 16;
> >  			pre_div = 15;
> > 
> 
> Agree - do you also get a case where the divider was too low and the
> SPI
> does not work or it was only examining the code ?

It was only examining the code. I had many clock issues on i.MX51, so I made a
global review of clock usage that led to that. Most i.MX5 clock functions are
broken. I have a series fixing these that I will post next week.

> Acked-by: Stefano Babic <sbabic@denx.de>
> 
> Best regards,
> Stefano Babic

Best regards,
Beno?t

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [U-Boot] [PATCH] mxc_spi: Round up clock divider
  2012-08-10 18:51 ` [U-Boot] [PATCH] mxc_spi: Round up clock divider Benoît Thébaudeau
  2012-08-11 10:37   ` Stefano Babic
@ 2012-08-20  7:54   ` Stefano Babic
  1 sibling, 0 replies; 4+ messages in thread
From: Stefano Babic @ 2012-08-20  7:54 UTC (permalink / raw)
  To: u-boot

On 10/08/2012 20:51, Beno?t Th?baudeau wrote:
> Since the input frequency of the API is a maximum that should not be exceeded in
> order for the devices to operate properly, the SPI clock divider should be
> rounded up, not truncated.
> 
> Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  .../drivers/spi/mxc_spi.c                          |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c u-boot-4d3c95f/drivers/spi/mxc_spi.c
> index 2e15318..cf1462f 100644
> --- u-boot-4d3c95f.orig/drivers/spi/mxc_spi.c
> +++ u-boot-4d3c95f/drivers/spi/mxc_spi.c
> @@ -96,7 +96,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
>  
>  	clk_src = mxc_get_clock(MXC_CSPI_CLK);
>  
> -	div = clk_src / max_hz;
> +	div = DIV_ROUND_UP(clk_src, max_hz);
>  	div = get_cspi_div(div);
>  
>  	debug("clk %d Hz, div %d, real clk %d Hz\n",
> @@ -147,7 +147,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
>  	 * The following computation is taken directly from Freescale's code.
>  	 */
>  	if (clk_src > max_hz) {
> -		pre_div = clk_src / max_hz;
> +		pre_div = DIV_ROUND_UP(clk_src, max_hz);
>  		if (pre_div > 16) {
>  			post_div = pre_div / 16;
>  			pre_div = 15;
> 

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2012-08-20  7:54 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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     [not found] <797579011.2281948.1344624706885.JavaMail.root@advansee.com>
2012-08-10 18:51 ` [U-Boot] [PATCH] mxc_spi: Round up clock divider Benoît Thébaudeau
2012-08-11 10:37   ` Stefano Babic
2012-08-11 14:23     ` Benoît Thébaudeau
2012-08-20  7:54   ` Stefano Babic

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