[U-Boot] [PATCH 2/5] cosmetic: checkpatch cleanup arch/x86/cpu/*.c

[Graeme Russ <graeme.russ@gmail.com>]

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
---
./checkpatch.pl --no-tree -f arch/x86/cpu/*.c
total: 0 errors, 0 warnings, 157 lines checked

arch/x86/cpu/cpu.c has no obvious style problems and is ready for submission.
total: 0 errors, 0 warnings, 675 lines checked

arch/x86/cpu/interrupts.c has no obvious style problems and is ready for
submission.

 arch/x86/cpu/cpu.c        |   22 +++++++++++-----------
 arch/x86/cpu/interrupts.c |   29 +++++++++++++++--------------
 2 files changed, 26 insertions(+), 25 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index cac12c0..48d2f7a 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -52,7 +52,7 @@
 struct gdt_ptr {
 	u16 len;
 	u32 ptr;
-} __attribute__((packed));
+} __packed;

 static void reload_gdt(void)
 {
@@ -115,14 +115,14 @@ int x86_cpu_init_r(void)
 	reload_gdt();

 	/* Initialize core interrupt and exception functionality of CPU */
-	cpu_init_interrupts ();
+	cpu_init_interrupts();
 	return 0;
 }
 int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));

 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-	printf ("resetting ...\n");
+	printf("resetting ...\n");

 	/* wait 50 ms */
 	udelay(50000);
@@ -133,7 +133,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }

-void  flush_cache (unsigned long dummy1, unsigned long dummy2)
+void  flush_cache(unsigned long dummy1, unsigned long dummy2)
 {
 	asm("wbinvd\n");
 }
@@ -142,16 +142,16 @@ void __attribute__ ((regparm(0))) generate_gpf(void);

 /* segment 0x70 is an arbitrary segment which does not exist */
 asm(".globl generate_gpf\n"
-    ".hidden generate_gpf\n"
-    ".type generate_gpf, @function\n"
-    "generate_gpf:\n"
-    "ljmp   $0x70, $0x47114711\n");
+	".hidden generate_gpf\n"
+	".type generate_gpf, @function\n"
+	"generate_gpf:\n"
+	"ljmp   $0x70, $0x47114711\n");

 void __reset_cpu(ulong addr)
 {
 	printf("Resetting using x86 Triple Fault\n");
-	set_vector(13, generate_gpf);  /* general protection fault handler */
-	set_vector(8, generate_gpf);   /* double fault handler */
-	generate_gpf();                /* start the show */
+	set_vector(13, generate_gpf);	/* general protection fault handler */
+	set_vector(8, generate_gpf);	/* double fault handler */
+	generate_gpf();			/* start the show */
 }
 void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index 89f39d2..07e945c 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -83,22 +83,22 @@ static inline unsigned long get_debugreg(int regno)

 	switch (regno) {
 	case 0:
-		asm("mov %%db0, %0" :"=r" (val));
+		asm("mov %%db0, %0" : "=r" (val));
 		break;
 	case 1:
-		asm("mov %%db1, %0" :"=r" (val));
+		asm("mov %%db1, %0" : "=r" (val));
 		break;
 	case 2:
-		asm("mov %%db2, %0" :"=r" (val));
+		asm("mov %%db2, %0" : "=r" (val));
 		break;
 	case 3:
-		asm("mov %%db3, %0" :"=r" (val));
+		asm("mov %%db3, %0" : "=r" (val));
 		break;
 	case 6:
-		asm("mov %%db6, %0" :"=r" (val));
+		asm("mov %%db6, %0" : "=r" (val));
 		break;
 	case 7:
-		asm("mov %%db7, %0" :"=r" (val));
+		asm("mov %%db7, %0" : "=r" (val));
 		break;
 	default:
 		val = 0;
@@ -120,7 +120,8 @@ void dump_regs(struct irq_regs *regs)
 	printf("ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
 		regs->esi, regs->edi, regs->ebp, regs->esp);
 	printf(" DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x\n",
-	       (u16)regs->xds, (u16)regs->xes, (u16)regs->xfs, (u16)regs->xgs, (u16)regs->xss);
+	       (u16)regs->xds, (u16)regs->xes, (u16)regs->xfs,
+	       (u16)regs->xgs, (u16)regs->xss);

 	cr0 = read_cr0();
 	cr2 = read_cr2();
@@ -164,13 +165,13 @@ struct idt_entry {
 	u8	res;
 	u8	access;
 	u16	base_high;
-} __attribute__ ((packed));
+} __packed;

 struct desc_ptr {
 	unsigned short size;
 	unsigned long address;
 	unsigned short segment;
-} __attribute__((packed));
+} __packed;

 struct idt_entry idt[256];

@@ -178,7 +179,7 @@ struct desc_ptr idt_ptr;

 static inline void load_idt(const struct desc_ptr *dtr)
 {
-	asm volatile("cs lidt %0"::"m" (*dtr));
+	asm volatile("cs lidt %0" : : "m" (*dtr));
 }

 void set_vector(u8 intnum, void *routine)
@@ -187,8 +188,8 @@ void set_vector(u8 intnum, void *routine)
 	idt[intnum].base_low = (u16)((u32)(routine) & 0xffff);
 }

-void irq_0(void);
-void irq_1(void);
+static void irq_0(void);
+static void irq_1(void);

 int cpu_init_interrupts(void)
 {
@@ -201,7 +202,7 @@ int cpu_init_interrupts(void)
 	disable_interrupts();

 	/* Setup the IDT */
-	for (i=0;i<256;i++) {
+	for (i = 0; i < 256; i++) {
 		idt[i].access = 0x8e;
 		idt[i].res = 0;
 		idt[i].selector = 0x10;
@@ -238,7 +239,7 @@ int disable_interrupts(void)

 	asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : );

-	return flags & X86_EFLAGS_IF; /* IE flags is bit 9 */
+	return flags & X86_EFLAGS_IF;
 }

 /* IRQ Low-Level Service Routine */
--
1.7.5.2.317.g391b14