[U-Boot] [RFC 06/14] x86: cache tidy-ups

[Graeme Russ <graeme.russ@gmail.com>]

---
 arch/x86/cpu/cpu.c |   20 ++++++++++++--------
 1 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index a8069ad..7ec0c12 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -115,14 +115,6 @@ int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
 
 int x86_init_cache(void)
 {
-	const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD);
-
-	/* turn on the cache and disable write through */
-	asm("movl	%%cr0, %%eax\n"
-	    "andl	%0, %%eax\n"
-	    "movl	%%eax, %%cr0\n"
-	    "wbinvd\n" : : "i" (nw_cd_rst) : "eax");
-
 	return 0;
 }
 int init_cache(void) __attribute__((weak, alias("x86_init_cache")));
@@ -140,6 +132,18 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
+void enable_caches(void)
+{
+	const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD);
+
+	/* turn on the cache and disable write through */
+	asm("movl	%%cr0, %%eax\n"
+	    "andl	%0, %%eax\n"
+	    "movl	%%eax, %%cr0\n" : : "i" (nw_cd_rst) : "eax");
+
+	flush_cache(0, 0);
+}
+
 void  flush_cache(unsigned long dummy1, unsigned long dummy2)
 {
 	asm("wbinvd\n");
-- 
1.7.5.2.317.g391b14