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From: Graeme Russ <graeme.russ@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFC 07/14] CHECKPATCH: arch/x86/cpu/*
Date: Fri, 23 Dec 2011 23:25:44 +1100	[thread overview]
Message-ID: <1324643151-23642-8-git-send-email-graeme.russ@gmail.com> (raw)
In-Reply-To: <1324643151-23642-1-git-send-email-graeme.russ@gmail.com>

---
 arch/x86/cpu/cpu.c        |    2 +-
 arch/x86/cpu/interrupts.c |    2 +-
 arch/x86/cpu/start16.S    |   54 +++++++++++++++++++++++++++++++++++---------
 3 files changed, 45 insertions(+), 13 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 7ec0c12..70a864d 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -61,7 +61,7 @@ static void reload_gdt(void)
 	 * There are machines which are known to not boot with the GDT
 	 * being 8-byte unaligned.  Intel recommends 16 byte alignment
 	 */
-	static const u64 boot_gdt[] __attribute__((aligned(16))) = {
+	static const u64 boot_gdt[] __aligned(16) = {
 		/* CS: code, read/execute, 4 GB, base 0 */
 		[GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
 		/* DS: data, read/write, 4 GB, base 0 */
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index e0958eb..43ec3f8 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -174,7 +174,7 @@ struct desc_ptr {
 	unsigned short segment;
 } __packed;
 
-struct idt_entry idt[256] __attribute__((aligned(16)));
+struct idt_entry idt[256] __aligned(16);
 
 struct desc_ptr idt_ptr;
 
diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 33e53cd..f454827 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -86,7 +86,8 @@ gdt_ptr:
 	.word	0x20		/* limit (32 bytes = 4 GDT entries) */
 	.long	BOOT_SEG + gdt	/* base */
 
-	/* The GDT table ...
+	/*
+	 * The GDT table ...
 	 *
 	 *	 Selector	Type
 	 *	 0x00		NULL
@@ -96,15 +97,46 @@ gdt_ptr:
 	 */
 
 gdt:
-	.word	0, 0, 0, 0	/* NULL  */
-	.word	0, 0, 0, 0	/* unused */
+	/* The NULL Desciptor - Mandatory */
+	.word	0x0000		/* limit_low */
+	.word	0x0000		/* base_low */
+	.byte	0x00		/* base_middle */
+	.byte	0x00		/* access */
+	.byte	0x00		/* flags + limit_high */
+	.byte	0x00		/* base_high */
+
+	/* Unused Desciptor - (matches Linux) */
+	.word	0x0000		/* limit_low */
+	.word	0x0000		/* base_low */
+	.byte	0x00		/* base_middle */
+	.byte	0x00		/* access */
+	.byte	0x00		/* flags + limit_high */
+	.byte	0x00		/* base_high */
 
-	.word	0xFFFF		/* 4Gb - (0x100000*0x1000 = 4Gb) */
-	.word	0		/* base address = 0 */
-	.word	0x9B00		/* code read/exec */
-	.word	0x00CF		/* granularity = 4096, 386 (+5th nibble of limit) */
+	/*
+	 * The Code Segment Descriptor:
+	 * - Base   = 0x00000000
+	 * - Size   = 4GB
+	 * - Access = Present, Ring 0, Exec (Code), Readable
+	 * - Flags  = 4kB Granularity, 32-bit
+	 */
+	.word	0xffff		/* limit_low */
+	.word	0x0000		/* base_low */
+	.byte	0x00		/* base_middle */
+	.byte	0x9a		/* access */
+	.byte	0xcf		/* flags + limit_high */
+	.byte	0x00		/* base_high */
 
-	.word	0xFFFF		/* 4Gb - (0x100000*0x1000 = 4Gb) */
-	.word	0x0		/* base address = 0 */
-	.word	0x9300		/* data read/write */
-	.word	0x00CF		/* granularity = 4096, 386 (+5th nibble of limit) */
+	/*
+	 * The Data Segment Descriptor:
+	 * - Base   = 0x00000000
+	 * - Size   = 4GB
+	 * - Access = Present, Ring 0, Non-Exec (Data), Writable
+	 * - Flags  = 4kB Granularity, 32-bit
+	 */
+	.word	0xffff		/* limit_low */
+	.word	0x0000		/* base_low */
+	.byte	0x00		/* base_middle */
+	.byte	0x93		/* access */
+	.byte	0xcf		/* flags + limit_high */
+	.byte	0x00		/* base_high */
-- 
1.7.5.2.317.g391b14

  parent reply	other threads:[~2011-12-23 12:25 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-12-23 12:25 [U-Boot] [RFC 00/14] x86 touch-ups (Includes new init sequence!) Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 01/14] x86: Import glibc memcpy implementation Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 02/14] x86: Speed up copy-to-RAM and clear BSS operations Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 03/14] x86: Allow cache before copy to RAM Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 04/14] x86: Import MSR/MTRR code from Linux Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 05/14] x86: Create weak init_cache() function Graeme Russ
2011-12-29  5:39   ` Simon Glass
2011-12-23 12:25 ` [U-Boot] [RFC 06/14] x86: cache tidy-ups Graeme Russ
2011-12-23 12:25 ` Graeme Russ [this message]
2011-12-23 12:25 ` [U-Boot] [RFC 08/14] CHECKPATCH: arch/x86/lib/* Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 09/14] x86: Move do_go_exec() out of board.c Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 10/14] x86: Move setup_pcat_compatibility() " Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 11/14] x86: remove gd->start_addr_sp Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 12/14] x86: Move relocation code out of board.c Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 13/14] x86: Simplify board.c Graeme Russ
2011-12-23 12:25 ` [U-Boot] [RFC 14/14] x86: Tweak initialisation procedure Graeme Russ
2011-12-26  5:18 ` [U-Boot] [RFC 00/14] x86 touch-ups (Includes new init sequence!) Graeme Russ
2011-12-26  6:59   ` Simon Glass

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