[U-Boot] [PATCH] ARMv7: OMAP: Add init function for TWL4030 GBPR1 register

[Jonathan Solnit <jsolnit@gmail.com>]

The OMAP ROM code modifies the GBPR1 register, which can cause
unintended consequences.  This patch adds a function to restore GBPR1 to
its default value.

Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
---
 drivers/power/twl4030.c |    8 ++++++++
 include/twl4030.h       |   17 +++++++++++++++++
 2 files changed, 25 insertions(+), 0 deletions(-)

diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
index 4a4ddeb..ddaa7e1 100644
--- a/drivers/power/twl4030.c
+++ b/drivers/power/twl4030.c
@@ -103,3 +103,11 @@ void twl4030_power_mmc_init(void)
 				TWL4030_PM_RECEIVER_VMMC1_DEV_GRP,
 				TWL4030_PM_RECEIVER_DEV_GRP_P1);
 }
+
+void twl4030_madc_clk_init(void)
+{
+	/* Restore the default MADC clk */
+	twl4030_i2c_write_u8(TWL4030_CHIP_INTBR,
+				TWL4030_INTBR_GPBR1_MADC_HFCLK_EN | TWL4030_INTBR_GPBR1_DFLT_MADC_CLK_EN,
+				TWL4030_INTBR_GPBR1);
+}
diff --git a/include/twl4030.h b/include/twl4030.h
index 9cd32ab..60bfa79 100644
--- a/include/twl4030.h
+++ b/include/twl4030.h
@@ -482,6 +482,18 @@
 #define TWL4030_USB_PHY_CLK_CTRL			0xFE
 #define TWL4030_USB_PHY_CLK_CTRL_STS			0xFF
 
+/* General Purpose */
+#define TWL4030_INTBR_GPBR1						0x91
+
+#define TWL4030_INTBR_GPBR1_MADC_HFCLK_EN		(0x1 << 7)
+#define TWL4030_INTBR_GPBR1_MADC_3MHZ_EN		(0x1 << 6)
+#define TWL4030_INTBR_GPBR1_VBAT_MON_EN			(0x1 << 5)
+#define TWL4030_INTBR_GPBR1_DFLT_MADC_CLK_EN	(0x1 << 4)
+#define TWL4030_INTBR_GPBR1_PWM1_EN				(0x1 << 3)
+#define TWL4030_INTBR_GPBR1_PWM0_EN				(0x1 << 2)
+#define TWL4030_INTBR_GPBR1_PWM1_CLK_EN			(0x1 << 1)
+#define TWL4030_INTBR_GPBR1_PWM0_CLK_EN			(0x1 << 0)
+
 /*
  * Convience functions to read and write from TWL4030
  *
@@ -530,4 +542,9 @@ void twl4030_led_init(unsigned char ledon_mask);
  */
 int twl4030_usb_ulpi_init(void);
 
+/*
+ * MADC Clock
+ */
+void twl4030_madc_clk_init(void);
+
 #endif /* TWL4030_H */
-- 
1.7.1