From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Thu, 4 Oct 2012 12:14:37 -0500 Subject: [U-Boot] [PATCH v3 2/8] SPL: Port SPL framework to powerpc In-Reply-To: <506D3C82.7080204@denx.de> (from sr@denx.de on Thu Oct 4 02:36:34 2012) References: <1348650074-25878-1-git-send-email-sr@denx.de> <1348650074-25878-3-git-send-email-sr@denx.de> <1348874032.5580.27@snotra> <506AC006.5060502@denx.de> <1349208536.1805.3@snotra> <506D3C82.7080204@denx.de> Message-ID: <1349370877.15830.1@snotra> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 10/04/2012 02:36:34 AM, Stefan Roese wrote: > On 10/02/2012 10:08 PM, Scott Wood wrote: > >>>> +void __noreturn jump_to_image_linux(void *arg) > >>>> +{ > >>>> + debug("Entering kernel arg pointer: 0x%p\n", arg); > >>>> + typedef void (*image_entry_arg_t)(void *, ulong r4, > ulong r5, > >>>> ulong r6, > >>>> + ulong r7, ulong r8, > ulong r9) > >>>> + __attribute__ ((noreturn)); > >>>> + image_entry_arg_t image_entry = > >>>> + (image_entry_arg_t)spl_image.entry_point; > >>>> + > >>>> + image_entry(arg, 0, 0, EPAPR_MAGIC, > CONFIG_SYS_BOOTMAPSZ, 0, 0); > >>>> +} > >>> > >>> At what point does the image get cache-flushed? > >> > >> Not at all right now. MPC5200 has dcache disabled, at least in the > >> SPL. > >> Other PowerPC architectures might add a cache flush here if needed > at > >> some time. Okay? > > > > Or they might forget to do so and have weird bugs. > > > > Why not just call flush_cache() on the image now? Non-SPL does > this in > > common code, not even PPC-specific. > > Okay, probably better to add this code now. But shouldn't we add this > code to the common SPL framework code then? Right before calling > jump_to_image_linux()? Sure, I didn't mean it should go here (it needs to be somewhere that knows the image start/end, not just the entry point). This is just the patch that prompted me to ask the question. -Scott