From mboxrd@z Thu Jan 1 00:00:00 1970 From: Scott Wood Date: Thu, 11 Oct 2012 16:09:28 -0500 Subject: [U-Boot] [PATCH] ARM926: Add mb to the cache invalidate/flush In-Reply-To: <20121011220132.0dfc1b48@lilith> (from albert.u.boot@aribaud.net on Thu Oct 11 15:01:32 2012) References: <1349822669-26274-1-git-send-email-marex@denx.de> <20121011073146.43ba7000@lilith> <95DC1AA8EC908B48939B72CF375AA5E3053318DC84@alice.at.omicron.at> <20121011220132.0dfc1b48@lilith> Message-ID: <1349989768.6903.18@snotra> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 10/11/2012 03:01:32 PM, Albert ARIBAUD wrote: > Hi Mark, > > Thanks for your example. > > > My understanding of gcc is that global memory accesses are meant to > > stay on the correct side of an asm with a "memory" clobber. The gcc > > manual states that if you use a memory clobber, the asm should also > > be volatile. > > Not exactly. It states that you need to add volatile if you cannot > tell > where in memory your instruction will write; if you can tell (by > specifying "m" as an output of the asm) then volatile is not > needed -- simply because the compiler can tell where in memory the > write will happen, and will thus not eliminate the asm statement as > long as the destination memory is not optimized out. You're confusing the part about adding volatile to the asm statement to keep it from being completely removed, from anything to do with ordering or clobbers. -Scott