From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Tue, 16 Oct 2012 12:52:51 -0500
Subject: [U-Boot] reg: P2020 include config file - u-boot basic doubt
In-Reply-To: <CAOwdAkZOncsq_mbh+n-mHLF1WxNOD4QWT9RBejqiVpOYaP8YUw@mail.gmail.com>
	(from diya8off@gmail.com on Tue Oct 16 07:51:24 2012)
References: <CAOwdAkZOncsq_mbh+n-mHLF1WxNOD4QWT9RBejqiVpOYaP8YUw@mail.gmail.com>
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On 10/16/2012 07:51:24 AM, vidya Krishnamoorthy wrote:
> Hi
> 
> Anybody worked in P2020 ..Please clarify my basic doubt
> 
> The e500 core datasheet says processor reset vector address is  
> 0xFFFFFFC
> 
> but in p2020 u-boot config file , CONFIG_RESET_VECTOR_ADDRESS is
> defined as    0xEFFFFFFC.
> 
> With boot sequencer disabled and with BPTR reg value = 0, how the
> reset vector address will change from 0xfffffffC to effffffC   in  
> u-boot

0xfffffffc is the reset vector at power-on, and is where the upper 8  
MiB of NOR flash is mapped immediately after reset.  0xeffffffc is the  
link address of the branch instruction that goes at the reset vector,  
after software changes the mapping of NOR flash to its permanent  
location.

-Scott