[U-Boot] [PATCH 4/4] ARM: tegra: increase CONFIG_SYS_TEXT_BASE

[Lucas Stach <dev@lynxeye.de>]

Am Dienstag, den 16.10.2012, 15:50 -0600 schrieb Stephen Warren:
> From: Stephen Warren <swarren@nvidia.com>
> 
> The SPL has grown. Increase CONFIG_SYS_TEXT_BASE so SPL's BSS does not
> overlap the main U-Boot.
> 
Is there any specific reason why the SPL is now bigger than before? Or
is this just because of the general U-Boot rework (like serial multi
anywhere)? And by how much has it grown? This is really more out of
curiosity rather than any real objection.

Aside from this I think the general idea is reasonable, as we are not
shipping a particularly slim U-Boot on any Tegra platform, nor do we
have to hit a hard size limit, so for the series:

Acked-by: Lucas Stach <dev@lynxeye.de>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> ---
>  include/configs/tegra20-common.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
> index dc7444d..ced278d 100644
> --- a/include/configs/tegra20-common.h
> +++ b/include/configs/tegra20-common.h
> @@ -168,7 +168,7 @@
>  #define PHYS_SDRAM_1		NV_PA_SDRC_CS0
>  #define PHYS_SDRAM_1_SIZE	0x20000000	/* 512M */
>  
> -#define CONFIG_SYS_TEXT_BASE	0x0010c000
> +#define CONFIG_SYS_TEXT_BASE	0x0010d000
>  #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
>  
>  #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_STACKBASE