From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lucas Stach Date: Tue, 30 Oct 2012 10:22:52 +0100 Subject: [U-Boot] =?utf-8?q?=5BPATCH_7/8=5D_tegra=3A_usb=3A_move_implement?= =?utf-8?q?ation_into_right_directory?= In-Reply-To: <1351588973-20699-1-git-send-email-dev@lynxeye.de> References: <1351588973-20699-1-git-send-email-dev@lynxeye.de> Message-ID: <1351588973-20699-7-git-send-email-dev@lynxeye.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de This moves the Tegra USB implementation into the drivers/usb/host directory. Signed-off-by: Lucas Stach --- arch/arm/cpu/armv7/tegra20/Makefile | 2 - .../tegra20/usb.c => drivers/usb/host/ehci-tegra.c | 60 ++++++++++++++++++++-- 2 Dateien ge?ndert, 55 Zeilen hinzugef?gt(+), 7 Zeilen entfernt(-) rename arch/arm/cpu/armv7/tegra20/usb.c => drivers/usb/host/ehci-tegra.c (92%) diff --git a/arch/arm/cpu/armv7/tegra20/Makefile b/arch/arm/cpu/armv7/tegra20/Makefile index 09a0314..2c4d5c9 100644 --- a/arch/arm/cpu/armv7/tegra20/Makefile +++ b/arch/arm/cpu/armv7/tegra20/Makefile @@ -27,8 +27,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o -COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o - COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/arch/arm/cpu/armv7/tegra20/usb.c b/drivers/usb/host/ehci-tegra.c similarity index 92% rename from arch/arm/cpu/armv7/tegra20/usb.c rename to drivers/usb/host/ehci-tegra.c index 2cc95d2..3df43a9 100644 --- a/arch/arm/cpu/armv7/tegra20/usb.c +++ b/drivers/usb/host/ehci-tegra.c @@ -1,6 +1,7 @@ /* + * Copyright (c) 2009-2012 NVIDIA Corporation * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2010,2011 NVIDIA Corporation + * Copyright (c) 2012 Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -21,14 +22,16 @@ * MA 02111-1307 USA */ -#include #include -#include #include #include -#include -#include +#include +#include #include +#include +#include +#include +#include "ehci.h" #ifdef CONFIG_USB_ULPI #ifndef CONFIG_USB_ULPI_VIEWPORT @@ -138,6 +141,23 @@ static const u8 utmip_elastic_limit = 16; /* UTMIP High Speed Sync Start Delay */ static const u8 utmip_hs_sync_start_delay = 9; +/* + * A known hardware issue where Connect Status Change bit of PORTSC register + * of USB1 controller will be set after Port Reset. + * We have to clear it in order for later device enumeration to proceed. + * This ehci_powerup_fixup overrides the weak function ehci_powerup_fixup + * in "ehci-hcd.c". + */ +void ehci_powerup_fixup(uint32_t *status_reg, uint32_t *reg) +{ + mdelay(50); + if (((u32) status_reg & TEGRA_USB_ADDR_MASK) != TEGRA_USB1_BASE) + return; + /* For EHCI_PS_CSC to be cleared in ehci_hcd.c */ + if (ehci_readl(status_reg) & EHCI_PS_CSC) + *reg |= EHCI_PS_CSC; +} + /* Put the port into host mode */ static void set_host_mode(struct fdt_usb *config) { @@ -534,3 +554,33 @@ int board_usb_init(const void *blob) return 0; } + +/* + * Create the appropriate control structures to manage + * a new EHCI host controller. + */ +int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) +{ + u32 our_hccr, our_hcor; + + /* + * Select the first port, as we don't have a way of selecting others + * yet + */ + if (tegrausb_start_port(index, &our_hccr, &our_hcor)) + return -1; + + *hccr = (struct ehci_hccr *)our_hccr; + *hcor = (struct ehci_hcor *)our_hcor; + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop(int index) +{ + return tegrausb_stop_port(index); +} -- 1.7.11.7