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* [U-Boot] NOR NAND Interference question
@ 2013-01-04 23:47 Andrei
  2013-01-08  0:37 ` Scott Wood
  0 siblings, 1 reply; 3+ messages in thread
From: Andrei @ 2013-01-04 23:47 UTC (permalink / raw)
  To: u-boot

Hi,
 Recently I am start getting strange problem
with u-boot-2011.09. MPC8313ERDB like
configuration ( main change - I am using 
different NAND flash - 256MBib - need change
page size)

If I am access NAND flash before nor
u-boot not always read NOR correctly.

>mtdparts 

device nor0 <phys_mapped_flash>, # parts = 3
 #: name                size            offset          mask_flags
 0: u-boot              0x000e0000      0x00000000      0
 1: env                 0x00020000      0x000e0000      0
 2: jffs2               0x01f00000      0x00100000      0

device nand0 <e2800000.flash>, # parts = 1
 #: name                size            offset          mask_flags
 0: ubifs               0x10000000      0x00000000      0

If I do:
ubi part ubifs;ubifsmount iptec_nand

and read something from NAND before I read NOR

I am getting time to time after Linux update 
uImage: 

>run boot_cmd
### JFFS2 loading 'BANK1/uImage' to 0x100000
Scanning JFFS2 FS: . done.
### JFFS2 load complete: 4926025 bytes loaded to 0x100000
### JFFS2 loading 'BANK1/vnp100_dtb.dtb' to 0x900000
### JFFS2 load complete: 10205 bytes loaded to 0x900000
## Booting kernel from Legacy Image at 00100000 ...
   Image Name:   Linux-2.6.38.8
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    4925961 Bytes = 4.7 MiB
   Load Address: 02000000
   Entry Point:  02000000
   Verifying Checksum ... Bad Data CRC
ERROR: can't get kernel image!

but if I reset board and skip NAND access 
it always fine, some times I can add or remove
some environment variable after NAND access
and it boot even without reset:

>run boot_cmd
### JFFS2 loading 'BANK1/uImage' to 0x100000
Scanning JFFS2 FS: . done.
### JFFS2 load complete: 4926025 bytes loaded to 0x100000
### JFFS2 loading 'BANK1/vnp100_dtb.dtb' to 0x900000
### JFFS2 load complete: 10205 bytes loaded to 0x900000
## Booting kernel from Legacy Image at 00100000 ...
   Image Name:   Linux-2.6.38.8
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    4925961 Bytes = 4.7 MiB
   Load Address: 02000000
   Entry Point:  02000000
   Verifying Checksum ... OK
## Flattened Device Tree blob at 00900000
   Booting using the fdt blob at 0x900000
   Uncompressing Kernel Image ... OK
   Loading Device Tree to 007fa000, end 007ff7dc ... OK

I found most stable configuration:
mount NAND, read NAND,
chaprt nor0,2
boot

and most unstable
chaprt nor0,2
mount NAND, read NAND,
boot

And I did increase malloc size to 1M.( ubifs does not like 128K).
There is no option for stack size  - it is PPC,
so it should grow down as needed.

As long I am not mixing NOR and NAND evithing working perfect.

Any idea?

Thanks,
Andrei

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot] NOR NAND Interference question
  2013-01-04 23:47 [U-Boot] NOR NAND Interference question Andrei
@ 2013-01-08  0:37 ` Scott Wood
  2013-01-09  0:44   ` Andrei
  0 siblings, 1 reply; 3+ messages in thread
From: Scott Wood @ 2013-01-08  0:37 UTC (permalink / raw)
  To: u-boot

On 01/04/2013 05:47:06 PM, Andrei wrote:
> Hi,
>  Recently I am start getting strange problem
> with u-boot-2011.09. MPC8313ERDB like
> configuration ( main change - I am using
> different NAND flash - 256MBib - need change
> page size)

Please always try with the latest U-Boot when you have a problem -- or  
even when you don't have a problem. :-)

> If I am access NAND flash before nor
> u-boot not always read NOR correctly.
> 
> >mtdparts
> 
> device nor0 <phys_mapped_flash>, # parts = 3
>  #: name                size            offset          mask_flags
>  0: u-boot              0x000e0000      0x00000000      0
>  1: env                 0x00020000      0x000e0000      0
>  2: jffs2               0x01f00000      0x00100000      0
> 
> device nand0 <e2800000.flash>, # parts = 1
>  #: name                size            offset          mask_flags
>  0: ubifs               0x10000000      0x00000000      0
> 
> If I do:
> ubi part ubifs;ubifsmount iptec_nand
> 
> and read something from NAND before I read NOR

How much time passes between the NAND access and the NOR access?  If  
it's all part of a script, maybe the NAND access isn't quite finished  
when the command returns.

We used to have problems on Linux with NAND and NOR interfering, though  
I wouldn't think that it would be possible in U-Boot even with the old  
broken code because of its single-tasking nature.

One thing you might want to try is applying Linux commit  
476459a6cf46d20ec73d9b211f3894ced5f9871e ("mtd: eLBC NAND: use  
recommended command sequences") to U-Boot.

> I found most stable configuration:
> mount NAND, read NAND,
> chaprt nor0,2
> boot
> 
> and most unstable
> chaprt nor0,2
> mount NAND, read NAND,
> boot

I don't see "chaprt" in the U-Boot sources.  Where did you get U-Boot  
from?

I thought your problem was doing NAND before NOR, not the other way  
around.

> And I did increase malloc size to 1M.( ubifs does not like 128K).

MPC8313ERDB has always had a malloc size of 512K -- where did 128K come  
from?

> There is no option for stack size  - it is PPC,
> so it should grow down as needed.

It grows down within the area that has been designated for the stack.   
This area is not very large.  Do you have any reason to believe you're  
seeing stack issues?

-Scott

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot] NOR NAND Interference question
  2013-01-08  0:37 ` Scott Wood
@ 2013-01-09  0:44   ` Andrei
  0 siblings, 0 replies; 3+ messages in thread
From: Andrei @ 2013-01-09  0:44 UTC (permalink / raw)
  To: u-boot

Hi Scott,
 Thanks for you replay and sorry for my not speedy answer
comments below.

On Mon, 2013-01-07 at 18:37 -0600, Scott Wood wrote:
> On 01/04/2013 05:47:06 PM, Andrei wrote:
> > Hi,
> >  Recently I am start getting strange problem
> > with u-boot-2011.09. MPC8313ERDB like
> > configuration ( main change - I am using
> > different NAND flash - 256MBib - need change
> > page size)
> 
> Please always try with the latest U-Boot when you have a problem -- or  
> even when you don't have a problem. :-)
> 
> > If I am access NAND flash before nor
> > u-boot not always read NOR correctly.
> > 
> > >mtdparts
> > 
> > device nor0 <phys_mapped_flash>, # parts = 3
> >  #: name                size            offset          mask_flags
> >  0: u-boot              0x000e0000      0x00000000      0
> >  1: env                 0x00020000      0x000e0000      0
> >  2: jffs2               0x01f00000      0x00100000      0
> > 
> > device nand0 <e2800000.flash>, # parts = 1
> >  #: name                size            offset          mask_flags
> >  0: ubifs               0x10000000      0x00000000      0
> > 
> > If I do:
> > ubi part ubifs;ubifsmount iptec_nand
> > 
> > and read something from NAND before I read NOR
> 
> How much time passes between the NAND access and the NOR access?  If  
> it's all part of a script, maybe the NAND access isn't quite finished  
> when the command returns.
It is few seconds - I am reading from NAND fpga images and loading them
 to FPGA's
> 
> We used to have problems on Linux with NAND and NOR interfering, though  
> I wouldn't think that it would be possible in U-Boot even with the old  
> broken code because of its single-tasking nature.
> 
> One thing you might want to try is applying Linux commit  
> 476459a6cf46d20ec73d9b211f3894ced5f9871e ("mtd: eLBC NAND: use  
> recommended command sequences") to U-Boot.
 I almost apply this patch already. Thanks for point out on it.
 Few changes in it. I do not know how it related to Linux, but I can not
 use CM0/CM2 instead of CW0 - even U-boot NAND detection get unstable
( READID command) if I replace CW0 to CM0  - so I kept CW0 every where,
but before I miss changes in fsl_elbc_wait() - I have add it.
> 
> > I found most stable configuration:
> > mount NAND, read NAND,
> > chaprt nor0,2
> > boot
> > 
> > and most unstable
> > chaprt nor0,2
> > mount NAND, read NAND,
> > boot
> 
> I don't see "chaprt" in the U-Boot sources.  Where did you get U-Boot  
> from?
 Sorry for my mistype "chpart" 
> 
> I thought your problem was doing NAND before NOR, not the other way  
> around.
Yes you correct, but it looks like chaprt command part ( as I
understand) NOR or jffs MTDs and has nothing to do ubi mtd.
And with few more test "ubiload"  command corrupt next nor  
access no matter  time is passing after that. Making me believe
to memory than bus issue. eLbc as I remember must have bus timeout
around few seconds, it must release all chips after that.
> 
> > And I did increase malloc size to 1M.( ubifs does not like 128K).

> 
> MPC8313ERDB has always had a malloc size of 512K -- where did 128K come  
> from?
> 
Sorry for that I think I have bump malloc size due to ubi fread files
from ubi, bu I will check is it really needed.

> > There is no option for stack size  - it is PPC,
> > so it should grow down as needed.
> 
How it is limited? in .lds?
> It grows down within the area that has been designated for the stack.   
> This area is not very large.  Do you have any reason to believe you're  
> seeing stack issues?
> 
 As I understand  memory allocation is :
top
 malloc area,
 stack

or wise verse if one overshoot can corrupt other, and jffs keeping 
some staff from first scan.
I actually did not think about possibility of lbs hangs or corrupting
other CS, but Freesacle as usial :)
I will test more with this changes, but as I mention this is
intermittent issue, so I do not know whet I could declare it fixed.
I do not see reason to post a patch, due to currently is discussing in
mail list porting nand/ubi from Linux 3.xx something - so this changes
mostly will be in I hope soon.
> -Scott

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2013-01-09  0:44 UTC | newest]

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2013-01-08  0:37 ` Scott Wood
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