From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Mon, 18 Feb 2013 13:26:14 -0600
Subject: [U-Boot] [PATCH] powerpc/p1022ds: Add support for NAND and NAND
 boot using SPL
In-Reply-To: <70CC66F5C30A414DADDA6973E4CA391A8886A8@039-SN1MPN1-001.039d.mgd.msft.net>
	(from B29882@freescale.com on Mon Feb 18 13:24:44 2013)
References: <1360974866.6960.9@snotra>
	<1361214473-31182-1-git-send-email-msm@freescale.com>
	<1361215128.14186.15@snotra>
	<70CC66F5C30A414DADDA6973E4CA391A8886A8@039-SN1MPN1-001.039d.mgd.msft.net>
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On 02/18/2013 01:24:44 PM, McClintock Matthew-B29882 wrote:
> On Mon, Feb 18, 2013 at 1:18 PM, Scott Wood <scottwood@freescale.com>  
> wrote:
> > On 02/18/2013 01:07:53 PM, Matthew McClintock wrote:
> >>
> >> @@ -118,6 +172,7 @@
> >>   * Localbus non-cacheable
> >>   * 0xe000_0000 0xe80f_ffff     Promjet/free            128M  
> non-cacheable
> >>   * 0xe800_0000 0xefff_ffff     FLASH                   128M  
> non-cacheable
> >> + * 0xff80_0000 0xff80_1fff     NAND                    8K  
> non-cacheable
> >>   * 0xffdf_0000 0xffdf_7fff     PIXIS                   32K  
> non-cacheable
> >> TLB0
> >>   * 0xffd0_0000 0xffd0_3fff     L1 for stack            16K  
> Cacheable TLB0
> >>   * 0xffe0_0000 0xffef_ffff     CCSR                    1M  
> non-cacheable
> >
> >
> > This says 8K...
> >
> >
> >> +/* NAND flash config */
> >> +#define CONFIG_SYS_NAND_BR_PRELIM
> >> (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
> >> +                              | (2<<BR_DECC_SHIFT)    /* Use HW  
> ECC */ \
> >> +                              | BR_PS_8               /* Port  
> Size = 8
> >> bit */ \
> >> +                              | BR_MS_FCM             /* MSEL =  
> FCM */ \
> >> +                              | BR_V)                 /* valid */
> >> +#define CONFIG_SYS_NAND_OR_PRELIM  (OR_AM_256KB               /*  
> length
> >> 256K */ \
> >> +                              | OR_FCM_PGS            /* Large  
> Page*/ \
> >> +                              | OR_FCM_CSCT \
> >> +                              | OR_FCM_CST \
> >> +                              | OR_FCM_CHT \
> >> +                              | OR_FCM_SCY_1 \
> >> +                              | OR_FCM_TRLX \
> >> +                              | OR_FCM_EHTR)
> >
> >
> > ...this says 256K.
> >
> > IIRC the minimum for localbus is 32K.
> 
> And the law is 8K and TLB is 16K - should I go with 32K for
> everything? However, I don't think 32K TLB works on this part.

You don't need to create a 32K TLB, but the documented address map  
should agree with what you put in the actual hardware (and LAWs should  
agree with ORn/BRn).

-Scott