From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 18/21] powerpc/boot: Change the macro of Boot from SRIO and PCIE master module
Date: Fri, 22 Mar 2013 10:24:09 -0700 [thread overview]
Message-ID: <1363973052-25918-16-git-send-email-yorksun@freescale.com> (raw)
In-Reply-To: <1363973052-25918-1-git-send-email-yorksun@freescale.com>
From: Liu Gang <Gang.Liu@freescale.com>
Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to
"CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from
arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros
in configuration header file of each board which can support the
master module of Boot from SRIO and PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
README | 3 +++
arch/powerpc/cpu/mpc85xx/cpu_init.c | 2 +-
arch/powerpc/cpu/mpc8xxx/srio.c | 4 ++--
arch/powerpc/include/asm/config_mpc85xx.h | 4 ----
drivers/pci/fsl_pci_init.c | 6 +++---
include/configs/P2041RDB.h | 1 +
include/configs/P3041DS.h | 1 +
include/configs/P4080DS.h | 1 +
include/configs/P5020DS.h | 1 +
9 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/README b/README
index 7f2506a..626b86f 100644
--- a/README
+++ b/README
@@ -3753,6 +3753,9 @@ Low Level (hardware related) configuration options:
- CONFIG_SRIO2:
Board has SRIO 2 port available
+- CONFIG_SRIO_PCIE_BOOT_MASTER
+ Board can support master function for Boot from SRIO and PCIE
+
- CONFIG_SYS_SRIOn_MEM_VIRT:
Virtual Address of SRIO port 'n' memory region
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 8b12dd2..b90c8a8 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -564,7 +564,7 @@ skip_l2:
#ifdef CONFIG_SYS_SRIO
srio_init();
-#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
+#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
char *s = getenv("bootmaster");
if (s) {
if (!strcmp(s, "SRIO1")) {
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index 6e6f7dc..90d1065 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -24,7 +24,7 @@
#include <asm/fsl_srio.h>
#include <asm/errno.h>
-#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
+#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
#define SRIO_PORT_ACCEPT_ALL 0x10000001
#define SRIO_IB_ATMU_AR 0x80f55000
#define SRIO_OB_ATMU_AR_MAINT 0x80077000
@@ -299,7 +299,7 @@ void srio_init(void)
}
}
-#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
+#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
void srio_boot_master(int port)
{
struct ccsr_rio *srio = (void *)CONFIG_SYS_FSL_SRIO_ADDR;
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 7a1cdc7..0eb828f 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -337,7 +337,6 @@
#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
-#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
@@ -370,7 +369,6 @@
#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
-#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
@@ -412,7 +410,6 @@
#define CONFIG_SYS_P4080_ERRATUM_SERDES_A005
#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
-#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
@@ -447,7 +444,6 @@
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
-#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index d881375..32055d5 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -205,7 +205,7 @@ static int fsl_pci_setup_inbound_windows(struct pci_controller *hose,
return 1;
}
-#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
+#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
static void fsl_pcie_boot_master(pit_t *pi)
{
/* configure inbound window for slave's u-boot image */
@@ -382,7 +382,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
/* see if we are a PCIe or PCI controller */
pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap);
-#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
+#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
/* boot from PCIE --master */
char *s = getenv("bootmaster");
char pcie[6];
@@ -632,7 +632,7 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info,
if (fsl_is_pci_agent(hose)) {
fsl_pci_config_unlock(hose);
hose->last_busno = hose->first_busno;
-#ifdef CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
+#ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
} else {
/* boot from PCIE --master releases slave's core 0 */
char *s = getenv("bootmaster");
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index bbc53ce..ebef17f 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -77,6 +77,7 @@
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_DPAA_RMAN /* RMan */
#define CONFIG_FSL_LAW /* Use common FSL init code */
diff --git a/include/configs/P3041DS.h b/include/configs/P3041DS.h
index 468cc67..fd2fa7f 100644
--- a/include/configs/P3041DS.h
+++ b/include/configs/P3041DS.h
@@ -38,6 +38,7 @@
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_DPAA_RMAN
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h
index 7a8373a..9dad61c 100644
--- a/include/configs/P4080DS.h
+++ b/include/configs/P4080DS.h
@@ -35,6 +35,7 @@
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
#define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 ref clk freq */
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h
index 6a4bee9..1e3e1d8 100644
--- a/include/configs/P5020DS.h
+++ b/include/configs/P5020DS.h
@@ -38,6 +38,7 @@
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
#define CONFIG_SYS_FSL_RAID_ENGINE
#define CONFIG_SYS_DPAA_RMAN
--
1.7.9.5
next prev parent reply other threads:[~2013-03-22 17:24 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-22 17:23 [U-Boot] [PATCH 03/21] fsl_ifc: add support for different IFC bank count York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 04/21] powerpc/mpc85xx b8460 PCIe registers are not at QORIQ_CHASSIS2 location York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 05/21] powerpc/mpc85xx: Add setting of clock-frequency for T4/B4 clockgen node York Sun
2013-03-22 20:54 ` Wolfgang Denk
2013-03-22 17:23 ` [U-Boot] [PATCH 06/21] t4240qds/eth: fixup ethernet for t4240qds York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 07/21] net/fm: fixup ethernet for mEMAC York Sun
2013-03-22 20:55 ` Wolfgang Denk
2013-03-22 17:23 ` [U-Boot] [PATCH 08/21] powerpc/85xx: fix build error introduced by serdes_get_prtcl York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 09/21] net/phy: add VSC8574 support York Sun
2013-03-22 20:55 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 10/21] T4240/net: use QSGMII card PHY address by default York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 11/21] T4/usb: move usb 2.0 utmi dual phy init code to cpu_init.c York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 12/21] powerpc/mpc85xx: Update workaround for DDR erratum A-004934 York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 13/21] powerpc/mpc8xxx: Allow board file to override DDR address assignment York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 14/21] powerpc/b4860qds: Assign DDR address in board file York Sun
2013-03-22 20:57 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 15/21] powerpc/t4qds: Fix disabling remote I2C connection York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 16/21] T4240/eth: fix SGMII card PHY address York Sun
2013-03-22 20:57 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 17/21] powerpc/srio: Remove duplicate macro definitions York Sun
2013-03-22 17:24 ` York Sun [this message]
2013-03-22 17:24 ` [U-Boot] [PATCH 19/21] powerpc/b4860qds: Add the tlb entries for SRIO interfaces York Sun
2013-03-22 20:58 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 20/21] powerpc/b4860qds: Master module for boot from SRIO and PCIE York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 21/21] powerpc/b4860qds: Slave " York Sun
2013-03-22 20:58 ` Wolfgang Denk
2013-05-10 21:49 ` [U-Boot] [PATCH 03/21] fsl_ifc: add support for different IFC bank count Andy Fleming
2013-05-14 8:59 ` Hu Mingkai-B21284
2013-05-14 14:43 ` Fleming Andy-AFLEMING
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