[U-Boot] [PATCH 20/21] powerpc/b4860qds: Master module for boot from SRIO and PCIE

[York Sun <yorksun@freescale.com>]

From: Liu Gang <Gang.Liu@freescale.com>

For the powerpc processors with PCIE and SRIO interface, boot location can be
configured from one PCIE or SRIO interface by RCW. The processor booting from
PCIE or SRIO can do without flash for u-boot image. The image can be fetched
from another processor's memory space by PCIE or SRIO link connected between
them.

The processor booting from PCIE or SRIO is slave, the processor booting from
normal flash memory space is master, and it can help slave to boot from
master's memory space.

When boot from PCIE or SRIO, slave's core should be in holdoff after powered
on for some specific requirements. Master will release the slave's core at
the right time by PCIE or SRIO interface.

Environment and requirement:

master:
    1. NOR flash for its own u-boot image, ucode and ENV space.
    2. Slave's u-boot image is in master NOR flash.
    3. Normally boot from local NOR flash.
    4. Configure PCIE or SRIO system if needed.
slave:
    1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
    2. Boot location should be set to one PCIE or SRIO interface by RCW.
    3. RCW should configure the SerDes, PCIE or SRIO interfaces correctly.
	4. Must set all the cores in holdoff by RCW.
	5. Must be powered on before master's boot.

For the master module, need to finish these processes:
    1. Initialize the PCIE or SRIO port and address space.
    2. Set inbound PCIE or SRIO windows covered slave's u-boot image stored
	   in master's NOR flash.
	3. Set outbound windows in order to configure slave's registers
	   for the core's releasing.
    4. Should set the environment variable "bootmaster" to "PCIE1" or
	   "SRIO1", "SRIO2" using the following command:

			setenv bootmaster PCIE1 (or setenv bootmaster SRIO1)
			saveenv

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
 include/configs/B4860QDS.h |    1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index b09119a..81cd584 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -64,6 +64,7 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
 #define CONFIG_SRIO2			/* SRIO port 2 */
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
 #endif
 
 #define CONFIG_FSL_LAW			/* Use common FSL init code */
-- 
1.7.9.5