From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 06/21] t4240qds/eth: fixup ethernet for t4240qds
Date: Fri, 22 Mar 2013 10:23:57 -0700 [thread overview]
Message-ID: <1363973052-25918-4-git-send-email-yorksun@freescale.com> (raw)
In-Reply-To: <1363973052-25918-1-git-send-email-yorksun@freescale.com>
From: Shengzhou Liu <Shengzhou.Liu@freescale.com>
1, Implemented board_ft_fman_fixup_port() to fix port for kernel.
2, Implemented fdt_fixup_board_enet() to fix node status of different
slots and interfaces.
3, Adding detection of slot present for XGMII interface.
4, There is no PHY for XFI, so removed related phy address settings.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
arch/powerpc/include/asm/fsl_serdes.h | 1 +
board/freescale/t4qds/eth.c | 104 ++++++++++++++++++++++++++++-----
include/configs/t4qds.h | 4 --
3 files changed, 91 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h
index 6cd7379..c462455 100644
--- a/arch/powerpc/include/asm/fsl_serdes.h
+++ b/arch/powerpc/include/asm/fsl_serdes.h
@@ -91,6 +91,7 @@ enum srds {
int is_serdes_configured(enum srds_prtcl device);
void fsl_serdes_init(void);
+enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
#ifdef CONFIG_FSL_CORENET
#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
diff --git a/board/freescale/t4qds/eth.c b/board/freescale/t4qds/eth.c
index a49c7d4..8d2c33f 100644
--- a/board/freescale/t4qds/eth.c
+++ b/board/freescale/t4qds/eth.c
@@ -52,7 +52,7 @@
#define EMI1_SLOT4 4
#define EMI1_SLOT5 5
#define EMI1_SLOT7 7
-#define EMI2 8 /* tmp, FIXME */
+#define EMI2 8
/* Slot6 and Slot8 do not have EMI connections */
static int mdio_mux[NUM_FM_PORTS];
@@ -180,21 +180,86 @@ static int t4240qds_mdio_init(char *realbusname, u8 muxval)
void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
enum fm_port port, int offset)
{
- if (mdio_mux[port] == EMI1_RGMII)
- fdt_set_phy_handle(blob, prop, pa, "phy_rgmii");
-
- /* TODO: will do with dts */
+ if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) {
+ switch (port) {
+ case FM1_DTSEC9:
+ fdt_set_phy_handle(blob, prop, pa, "phy_sgmii4");
+ break;
+ case FM1_DTSEC10:
+ fdt_set_phy_handle(blob, prop, pa, "phy_sgmii3");
+ break;
+ case FM2_DTSEC9:
+ fdt_set_phy_handle(blob, prop, pa, "phy_sgmii12");
+ break;
+ case FM2_DTSEC10:
+ fdt_set_phy_handle(blob, prop, pa, "phy_sgmii11");
+ break;
+ default:
+ break;
+ }
+ }
}
void fdt_fixup_board_enet(void *fdt)
{
- /* TODO: will do with dts */
+ int i;
+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+ u32 prtcl2 = in_be32(&gur->rcwsr[4]) & FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
+
+ prtcl2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
+ for (i = FM1_DTSEC1; i < NUM_FM_PORTS; i++) {
+ switch (fm_info_get_enet_if(i)) {
+ case PHY_INTERFACE_MODE_SGMII:
+ switch (mdio_mux[i]) {
+ case EMI1_SLOT1:
+ fdt_status_okay_by_alias(fdt, "emi1_slot1");
+ break;
+ case EMI1_SLOT2:
+ fdt_status_okay_by_alias(fdt, "emi1_slot2");
+ break;
+ case EMI1_SLOT3:
+ fdt_status_okay_by_alias(fdt, "emi1_slot3");
+ break;
+ case EMI1_SLOT4:
+ fdt_status_okay_by_alias(fdt, "emi1_slot4");
+ break;
+ default:
+ break;
+ }
+ break;
+ case PHY_INTERFACE_MODE_XGMII:
+ /* check if it's XFI interface for 10g */
+ if ((prtcl2 == 56) || (prtcl2 == 57)) {
+ fdt_status_okay_by_alias(fdt, "emi2_xfislot3");
+ break;
+ }
+ switch (i) {
+ case FM1_10GEC1:
+ fdt_status_okay_by_alias(fdt, "emi2_xauislot1");
+ break;
+ case FM1_10GEC2:
+ fdt_status_okay_by_alias(fdt, "emi2_xauislot2");
+ break;
+ case FM2_10GEC1:
+ fdt_status_okay_by_alias(fdt, "emi2_xauislot3");
+ break;
+ case FM2_10GEC2:
+ fdt_status_okay_by_alias(fdt, "emi2_xauislot4");
+ break;
+ default:
+ break;
+ }
+ break;
+ default:
+ break;
+ }
+ }
}
int board_eth_init(bd_t *bis)
{
#if defined(CONFIG_FMAN_ENET)
- int i;
+ int i, idx, lane, slot;
struct memac_mdio_info dtsec_mdio_info;
struct memac_mdio_info tgec_mdio_info;
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
@@ -293,7 +358,7 @@ int board_eth_init(bd_t *bis)
}
for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
- int idx = i - FM1_DTSEC1, lane, slot;
+ idx = i - FM1_DTSEC1;
switch (fm_info_get_enet_if(i)) {
case PHY_INTERFACE_MODE_SGMII:
lane = serdes_get_first_lane(FSL_SRDS_1,
@@ -334,8 +399,16 @@ int board_eth_init(bd_t *bis)
}
for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
+ idx = i - FM1_10GEC1;
switch (fm_info_get_enet_if(i)) {
case PHY_INTERFACE_MODE_XGMII:
+ lane = serdes_get_first_lane(FSL_SRDS_1,
+ XAUI_FM1_MAC9 + idx);
+ if (lane < 0)
+ break;
+ slot = lane_to_slot_fsm1[lane];
+ if (QIXIS_READ(present2) & (1 << (slot - 1)))
+ fm_disable_port(i);
mdio_mux[i] = EMI2;
fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
break;
@@ -344,7 +417,6 @@ int board_eth_init(bd_t *bis)
}
}
-
#if (CONFIG_SYS_NUM_FMAN == 2)
switch (srds_prtcl_s2) {
case 1:
@@ -418,10 +490,6 @@ int board_eth_init(bd_t *bis)
case 56:
case 57:
/* XFI in Slot3, SGMII in Slot4 */
- fm_info_set_phy_address(FM1_10GEC1, XFI_CARD_PORT1_PHY_ADDR);
- fm_info_set_phy_address(FM1_10GEC2, XFI_CARD_PORT2_PHY_ADDR);
- fm_info_set_phy_address(FM2_10GEC2, XFI_CARD_PORT3_PHY_ADDR);
- fm_info_set_phy_address(FM2_10GEC1, XFI_CARD_PORT4_PHY_ADDR);
fm_info_set_phy_address(FM2_DTSEC1, SGMII_CARD_PORT1_PHY_ADDR);
fm_info_set_phy_address(FM2_DTSEC2, SGMII_CARD_PORT2_PHY_ADDR);
fm_info_set_phy_address(FM2_DTSEC3, SGMII_CARD_PORT3_PHY_ADDR);
@@ -433,7 +501,7 @@ int board_eth_init(bd_t *bis)
}
for (i = FM2_DTSEC1; i < FM2_DTSEC1 + CONFIG_SYS_NUM_FM2_DTSEC; i++) {
- int idx = i - FM2_DTSEC1, lane, slot;
+ idx = i - FM2_DTSEC1;
switch (fm_info_get_enet_if(i)) {
case PHY_INTERFACE_MODE_SGMII:
lane = serdes_get_first_lane(FSL_SRDS_2,
@@ -477,8 +545,16 @@ int board_eth_init(bd_t *bis)
}
for (i = FM2_10GEC1; i < FM2_10GEC1 + CONFIG_SYS_NUM_FM2_10GEC; i++) {
+ idx = i - FM2_10GEC1;
switch (fm_info_get_enet_if(i)) {
case PHY_INTERFACE_MODE_XGMII:
+ lane = serdes_get_first_lane(FSL_SRDS_2,
+ XAUI_FM2_MAC9 + idx);
+ if (lane < 0)
+ break;
+ slot = lane_to_slot_fsm2[lane];
+ if (QIXIS_READ(present2) & (1 << (slot - 1)))
+ fm_disable_port(i);
mdio_mux[i] = EMI2;
fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i]));
break;
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index a8346f0..ef8c5b2 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -649,10 +649,6 @@ unsigned long get_board_ddr_clk(void);
#define SGMII_CARD_PORT2_PHY_ADDR 0x1D
#define SGMII_CARD_PORT3_PHY_ADDR 0x1E
#define SGMII_CARD_PORT4_PHY_ADDR 0x1F
-#define XFI_CARD_PORT1_PHY_ADDR 0x1 /* tmp, FIXME below addr */
-#define XFI_CARD_PORT2_PHY_ADDR 0x2
-#define XFI_CARD_PORT3_PHY_ADDR 0x3
-#define XFI_CARD_PORT4_PHY_ADDR 0x4
#define QSGMII_CARD_PHY_ADDR 0x5
#define FM1_10GEC1_PHY_ADDR 0x0
#define FM1_10GEC2_PHY_ADDR 0x1
--
1.7.9.5
next prev parent reply other threads:[~2013-03-22 17:23 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-22 17:23 [U-Boot] [PATCH 03/21] fsl_ifc: add support for different IFC bank count York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 04/21] powerpc/mpc85xx b8460 PCIe registers are not at QORIQ_CHASSIS2 location York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 05/21] powerpc/mpc85xx: Add setting of clock-frequency for T4/B4 clockgen node York Sun
2013-03-22 20:54 ` Wolfgang Denk
2013-03-22 17:23 ` York Sun [this message]
2013-03-22 17:23 ` [U-Boot] [PATCH 07/21] net/fm: fixup ethernet for mEMAC York Sun
2013-03-22 20:55 ` Wolfgang Denk
2013-03-22 17:23 ` [U-Boot] [PATCH 08/21] powerpc/85xx: fix build error introduced by serdes_get_prtcl York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 09/21] net/phy: add VSC8574 support York Sun
2013-03-22 20:55 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 10/21] T4240/net: use QSGMII card PHY address by default York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 11/21] T4/usb: move usb 2.0 utmi dual phy init code to cpu_init.c York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 12/21] powerpc/mpc85xx: Update workaround for DDR erratum A-004934 York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 13/21] powerpc/mpc8xxx: Allow board file to override DDR address assignment York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 14/21] powerpc/b4860qds: Assign DDR address in board file York Sun
2013-03-22 20:57 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 15/21] powerpc/t4qds: Fix disabling remote I2C connection York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 16/21] T4240/eth: fix SGMII card PHY address York Sun
2013-03-22 20:57 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 17/21] powerpc/srio: Remove duplicate macro definitions York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 18/21] powerpc/boot: Change the macro of Boot from SRIO and PCIE master module York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 19/21] powerpc/b4860qds: Add the tlb entries for SRIO interfaces York Sun
2013-03-22 20:58 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 20/21] powerpc/b4860qds: Master module for boot from SRIO and PCIE York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 21/21] powerpc/b4860qds: Slave " York Sun
2013-03-22 20:58 ` Wolfgang Denk
2013-05-10 21:49 ` [U-Boot] [PATCH 03/21] fsl_ifc: add support for different IFC bank count Andy Fleming
2013-05-14 8:59 ` Hu Mingkai-B21284
2013-05-14 14:43 ` Fleming Andy-AFLEMING
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