From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 11/21] T4/usb: move usb 2.0 utmi dual phy init code to cpu_init.c
Date: Fri, 22 Mar 2013 10:24:02 -0700 [thread overview]
Message-ID: <1363973052-25918-9-git-send-email-yorksun@freescale.com> (raw)
In-Reply-To: <1363973052-25918-1-git-send-email-yorksun@freescale.com>
From: Roy Zang <tie-fei.zang@freescale.com>
This is what we have done for the UTMI PHY on P3041/P5020. Then the PHY
initialization can be reused in kernel without ?usb start? command.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
---
arch/powerpc/cpu/mpc85xx/cpu_init.c | 22 ++++++++++++++++++++++
drivers/usb/host/ehci-fsl.c | 21 ---------------------
2 files changed, 22 insertions(+), 21 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index de9d916..8b12dd2 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -623,6 +623,28 @@ skip_l2:
}
#endif
+#if defined(CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE)
+ ccsr_usb_phy_t *usb_phy =
+ (void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
+ setbits_be32(&usb_phy->pllprg[1],
+ CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN |
+ CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN |
+ CONFIG_SYS_FSL_USB_PLLPRG2_MFI |
+ CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN);
+ setbits_be32(&usb_phy->port1.ctrl,
+ CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+ setbits_be32(&usb_phy->port1.drvvbuscfg,
+ CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+ setbits_be32(&usb_phy->port1.pwrfltcfg,
+ CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+ setbits_be32(&usb_phy->port2.ctrl,
+ CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
+ setbits_be32(&usb_phy->port2.drvvbuscfg,
+ CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
+ setbits_be32(&usb_phy->port2.pwrfltcfg,
+ CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
+#endif
+
#ifdef CONFIG_FMAN_ENET
fman_enet_init();
#endif
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 81a70c0..f54b408 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -89,27 +89,6 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
if (!strcmp(phy_type, "utmi")) {
#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
-#if defined(CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE)
- ccsr_usb_phy_t *usb_phy =
- (void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
- setbits_be32(&usb_phy->pllprg[1],
- CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN |
- CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN |
- CONFIG_SYS_FSL_USB_PLLPRG2_MFI |
- CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN);
- setbits_be32(&usb_phy->port1.ctrl,
- CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
- setbits_be32(&usb_phy->port1.drvvbuscfg,
- CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
- setbits_be32(&usb_phy->port1.pwrfltcfg,
- CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
- setbits_be32(&usb_phy->port2.ctrl,
- CONFIG_SYS_FSL_USB_CTRL_PHY_EN);
- setbits_be32(&usb_phy->port2.drvvbuscfg,
- CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN);
- setbits_be32(&usb_phy->port2.pwrfltcfg,
- CONFIG_SYS_FSL_USB_PWRFLT_CR_EN);
-#endif
setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
setbits_be32(&ehci->control, UTMI_PHY_EN);
udelay(1000); /* delay required for PHY Clk to appear */
--
1.7.9.5
next prev parent reply other threads:[~2013-03-22 17:24 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-22 17:23 [U-Boot] [PATCH 03/21] fsl_ifc: add support for different IFC bank count York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 04/21] powerpc/mpc85xx b8460 PCIe registers are not at QORIQ_CHASSIS2 location York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 05/21] powerpc/mpc85xx: Add setting of clock-frequency for T4/B4 clockgen node York Sun
2013-03-22 20:54 ` Wolfgang Denk
2013-03-22 17:23 ` [U-Boot] [PATCH 06/21] t4240qds/eth: fixup ethernet for t4240qds York Sun
2013-03-22 17:23 ` [U-Boot] [PATCH 07/21] net/fm: fixup ethernet for mEMAC York Sun
2013-03-22 20:55 ` Wolfgang Denk
2013-03-22 17:23 ` [U-Boot] [PATCH 08/21] powerpc/85xx: fix build error introduced by serdes_get_prtcl York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 09/21] net/phy: add VSC8574 support York Sun
2013-03-22 20:55 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 10/21] T4240/net: use QSGMII card PHY address by default York Sun
2013-03-22 17:24 ` York Sun [this message]
2013-03-22 17:24 ` [U-Boot] [PATCH 12/21] powerpc/mpc85xx: Update workaround for DDR erratum A-004934 York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 13/21] powerpc/mpc8xxx: Allow board file to override DDR address assignment York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 14/21] powerpc/b4860qds: Assign DDR address in board file York Sun
2013-03-22 20:57 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 15/21] powerpc/t4qds: Fix disabling remote I2C connection York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 16/21] T4240/eth: fix SGMII card PHY address York Sun
2013-03-22 20:57 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 17/21] powerpc/srio: Remove duplicate macro definitions York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 18/21] powerpc/boot: Change the macro of Boot from SRIO and PCIE master module York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 19/21] powerpc/b4860qds: Add the tlb entries for SRIO interfaces York Sun
2013-03-22 20:58 ` Wolfgang Denk
2013-03-22 17:24 ` [U-Boot] [PATCH 20/21] powerpc/b4860qds: Master module for boot from SRIO and PCIE York Sun
2013-03-22 17:24 ` [U-Boot] [PATCH 21/21] powerpc/b4860qds: Slave " York Sun
2013-03-22 20:58 ` Wolfgang Denk
2013-05-10 21:49 ` [U-Boot] [PATCH 03/21] fsl_ifc: add support for different IFC bank count Andy Fleming
2013-05-14 8:59 ` Hu Mingkai-B21284
2013-05-14 14:43 ` Fleming Andy-AFLEMING
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