From mboxrd@z Thu Jan 1 00:00:00 1970 From: Fabio Estevam Date: Fri, 3 May 2013 11:37:10 -0300 Subject: [U-Boot] [PATCH v5 4/7] mxs: spl_mem_init: Fix comment about start bit In-Reply-To: <1367591833-17484-1-git-send-email-festevam@gmail.com> References: <1367591833-17484-1-git-send-email-festevam@gmail.com> Message-ID: <1367591833-17484-5-git-send-email-festevam@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Fabio Estevam Start bit is part of HW_DRAM_CTL8 register, so fix the comment. Signed-off-by: Fabio Estevam --- Changes since v4: - None Changes since v3: - None Changes since v2: - None Changes since v1: - Newly introduced as the previous patch is now splitted. arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 4950490..300da0a 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -267,7 +267,7 @@ static void mx23_mem_init(void) initialize_dram_values(); - /* Set START bit in DRAM_CTL16 */ + /* Set START bit in DRAM_CTL8 */ setbits_le32(MXS_DRAM_BASE + 0x20, 1 << 16); clrbits_le32(MXS_DRAM_BASE + 0x40, 1 << 17); -- 1.7.9.5