From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Wed, 15 May 2013 11:50:36 -0500
Subject: [U-Boot] [PATCH v2] powerpc/mpc85xx: The end address of the bss
 in the SPL should be 4byte alignment
In-Reply-To: <20130514103005.45F6B3804AF@gemini.denx.de> (from wd@denx.de on
	Tue May 14 05:30:05 2013)
References: <1368520918-22496-1-git-send-email-ying.zhang@freescale.com>
	<20130514103005.45F6B3804AF@gemini.denx.de>
Message-ID: <1368636636.8202.24@snotra>
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To: u-boot@lists.denx.de

On 05/14/2013 05:30:05 AM, Wolfgang Denk wrote:
> Dear ying.zhang at freescale.com,
> 
> In message  
> <1368520918-22496-1-git-send-email-ying.zhang@freescale.com> you  
> wrote:
> > From: Ying Zhang <b40530@freescale.com>
> 
> You mark this patch as V2 but there is no history of changes.  Please
> always include information what exactly was changed.
> 
> > There will clear the BSS in the function clear_bss(), the reset  
> address of
> > the BSS started from the __bss_start, and increased by four-byte  
> increments,
> > finally stoped depending on the adress is equal to the _bss_end. If  
> the end
> > address __bss_end is not alignment to 4byte, it will be an infinite  
> loop.
> >
> > The end address of the bss should be 4byte aligned.
> 
> NAK. This is the wrong way to fix this.
> 
> Instead, the test in the loop should be fixed to test for "<=".

I agree that we should use <= in the loop, but 4-byte alignment is also  
needed unless we change it from an stw loop to an stb loop.

-Scott