From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Tue, 11 Jun 2013 13:00:32 -0500
Subject: [U-Boot] [PATCH v2] powerpc/85xx: Add P1023RDB board support
In-Reply-To: <1370773445-25539-1-git-send-email-Chunhe.Lan@freescale.com>
	(from Chunhe.Lan@freescale.com on Sun Jun  9 05:24:05 2013)
Message-ID: <1370973632.18413.28@snotra>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 06/09/2013 05:24:05 AM, Chunhe Lan wrote:
> +	/* W**G* - Flash, localbus */
> +	/* This will be changed to *I*G* after relocation to RAM. */
> +	SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE,  
> CONFIG_SYS_FLASH_BASE_PHYS,
> +		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
> +		      0, 2, BOOKE_PAGESZ_256M, 1),

Do not set MAS3_SX on I/O regions.

> +	/* Bman/Qman */
> +	SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE,  
> CONFIG_SYS_BMAN_MEM_PHYS,
> +		      MAS3_SX|MAS3_SW|MAS3_SR, 0,
> +		      0, 7, BOOKE_PAGESZ_1M, 1),
> +	SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x00100000,
> +		      CONFIG_SYS_BMAN_MEM_PHYS + 0x00100000,
> +		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
> +		      0, 8, BOOKE_PAGESZ_1M, 1),
> +	SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE,  
> CONFIG_SYS_QMAN_MEM_PHYS,
> +		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
> +		      0, 9, BOOKE_PAGESZ_1M, 1),
> +	SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x00100000,
> +		      CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000,
> +		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
> +		      0, 10, BOOKE_PAGESZ_1M, 1),

Likewise.

> +/*
> + * Memory map
> + *
> + * 0x0000_0000	0x1fff_ffff	DDR			500M  
> Cacheable

500M?  Are you sure?

> + * 0x8000_0000	0xbfff_ffff	PCI Express Mem		1G  
> non-cacheable
> + * 0xc000_0000	0xdfff_ffff	PCI			512M  
> non-cacheable
> + * 0xe100_0000	0xe3ff_ffff	PCI IO range		4M  
> non-cacheable
> + * 0xff00_0000	0xff3f_ffff	DPAA_QBMAN		4M
> + *
> + * Localbus non-cacheable
> + *
> + * 0xec00_0000	0xefff_ffff	NOR flash		64M NOR  
> flash
> + * 0xff60_0000	0xff7f_ffff	CCSR			2M  
> non-cacheable
> + * 0xffa0_0000	0xffaf_ffff	NAND			1M  
> non-cacheable
> + * 0xffd0_0000	0xffd0_3fff	init ram		16K  
> Cacheable TLB0
> + */

The "init ram" is neither non-cacheable nor on the localbus.  CCSR is  
also not on the localbus.

> +/*
> + * For booting Linux, the board info and command line data
> + * have to be in the first 16 MB of memory, since this is
> + * the maximum mapped by the Linux kernel during initialization.
> + */
> +#define CONFIG_SYS_BOOTMAPSZ	(16 << 20) /* Initial Memory map for  
> Linux*/
> +#define CONFIG_SYS_BOOTM_LEN	(16 << 20) /* Increase max gunzip size  
> */

It's 64 MiB on 85xx.  Please watch the blind copy-and-paste.   
Especially, why are you blindly copying from a non-85xx config file?

> +#if defined(CONFIG_CMD_KGDB)
> +#define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial  
> port */
> +#define CONFIG_KGDB_SER_INDEX	2	/* which serial port to  
> use */
> +#endif

Get rid of this.

> +#define CONFIG_BOOTDELAY 10	/* -1 disables auto-boot */

The out-of-the-box environment is not going to work unmodified (I don't  
even see a CONFIG_BOOTCOMMAND), so let's just default this to -1 now  
that it no longer has the affect of disabling the code at compile-time.

-Scott