From mboxrd@z Thu Jan  1 00:00:00 1970
From: Scott Wood <scottwood@freescale.com>
Date: Thu, 13 Jun 2013 15:03:35 -0500
Subject: [U-Boot] [PATCH v3] powerpc/85xx: Add P1023RDB board support
In-Reply-To: <1371109457-19894-1-git-send-email-Chunhe.Lan@freescale.com>
	(from Chunhe.Lan@freescale.com on Thu Jun 13 02:44:17 2013)
References: <1371109457-19894-1-git-send-email-Chunhe.Lan@freescale.com>
Message-ID: <1371153815.2028.20@snotra>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On 06/13/2013 02:44:17 AM, Chunhe Lan wrote:
> +/*
> + * Memory map
> + *
> + * 0x0000_0000	0x1fff_ffff	DDR			500M  
> Cacheable
> + * 0x8000_0000	0xbfff_ffff	PCI Express Mem		1G  
> non-cacheable
> + * 0xc000_0000	0xdfff_ffff	PCI			512M  
> non-cacheable
> + * 0xe100_0000	0xe3ff_ffff	PCI IO range		4M  
> non-cacheable
> + * 0xff00_0000	0xff3f_ffff	DPAA_QBMAN		4M
> + *
> + * Localbus non-cacheable
> + *
> + * 0xec00_0000	0xefff_ffff	NOR flash		64M NOR  
> flash
> + * 0xff60_0000	0xff7f_ffff	CCSR			2M  
> non-cacheable
> + * 0xffa0_0000	0xffaf_ffff	NAND			1M  
> non-cacheable
> + * 0xffd0_0000	0xffd0_3fff	L1 for stack		16K  
> Cacheable TLB0
> + */

Same comments as before -- only two of those last four are under the  
localbus, and only three are non-cacheable.

Also, DPAA_QBMAN should say "4M cacheable" rather than "4M" for  
consistency.  Also, please capitalize consistently ("non-cacheable" and  
"Cacheable"). :-)

-Scott