[U-Boot] [PATCH v3 1/2] socfpga: Adding System Manager driver

[Chin Liang See <clsee@altera.com>]

socfpga: Adding System Manager driver which
will configure the pin mux for real hardware Cyclone V
development kit (not Virtual Platform)

Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
---
 arch/arm/cpu/armv7/socfpga/Makefile                |    2 +-
 arch/arm/cpu/armv7/socfpga/spl.c                   |    6 +++
 arch/arm/cpu/armv7/socfpga/system_manager.c        |   41
++++++++++++++++++++
 .../include/asm/arch-socfpga/socfpga_base_addrs.h  |    1 +
 arch/arm/include/asm/arch-socfpga/system_manager.h |   34
++++++++++++++++
 board/altera/socfpga_cyclone5/Makefile             |    4 +-
 include/configs/socfpga_cyclone5.h                 |    1 +
 7 files changed, 87 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/socfpga/system_manager.c
 create mode 100644 arch/arm/include/asm/arch-socfpga/system_manager.h

diff --git a/arch/arm/cpu/armv7/socfpga/Makefile
b/arch/arm/cpu/armv7/socfpga/Makefile
index 518e67a..cf2829a 100644
--- a/arch/arm/cpu/armv7/socfpga/Makefile
+++ b/arch/arm/cpu/armv7/socfpga/Makefile
@@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk
 LIB	=  $(obj)lib$(SOC).o
 
 SOBJS	:= lowlevel_init.o
-COBJS-y	:= misc.o timer.o reset_manager.o
+COBJS-y	:= misc.o timer.o reset_manager.o system_manager.o
 COBJS-$(CONFIG_SPL_BUILD) += spl.o
 
 COBJS	:= $(COBJS-y)
diff --git a/arch/arm/cpu/armv7/socfpga/spl.c
b/arch/arm/cpu/armv7/socfpga/spl.c
index 84216eb..28d8c99 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -23,6 +23,7 @@
 #include <image.h>
 #include <asm/arch/reset_manager.h>
 #include <spl.h>
+#include <asm/arch/system_manager.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -36,6 +37,11 @@ u32 spl_boot_device(void)
  */
 void spl_board_init(void)
 {
+#ifndef CONFIG_SOCFPGA_VIRTUAL_TARGET
+	/* configure the pin muxing through system manager */
+	sysmgr_pinmux_init();
+#endif /* CONFIG_SOCFPGA_VIRTUAL_TARGET */
+
 	/* de-assert reset for peripherals and bridges based on handoff */
 	reset_deassert_peripherals_handoff();
 
diff --git a/arch/arm/cpu/armv7/socfpga/system_manager.c
b/arch/arm/cpu/armv7/socfpga/system_manager.c
new file mode 100644
index 0000000..d893e97
--- /dev/null
+++ b/arch/arm/cpu/armv7/socfpga/system_manager.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright Altera Corporation (C) 2013. All rights reserved
+ *
+ * This program is free software; you can redistribute it
+ * and/or modify it under the terms and conditions of the
+ * GNU General Public License, version 2, as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/system_manager.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Configure all the pin muxes
+ */
+void sysmgr_pinmux_init(void)
+{
+	unsigned long offset = CONFIG_SYSMGR_PINMUXGRP_OFFSET;
+
+	const unsigned long *pval = sys_mgr_init_table;
+	unsigned long i;
+
+	for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table);
+		i++, offset += sizeof(unsigned long)) {
+		writel(*pval++, (SOCFPGA_SYSMGR_ADDRESS + offset));
+	}
+}
+
+
diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
index f353eb2..819c280 100644
--- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
+++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
@@ -23,5 +23,6 @@
 #define SOCFPGA_UART1_ADDRESS 0xffc03000
 #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
 #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
+#define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
 
 #endif /* _SOCFPGA_BASE_ADDRS_H_ */
diff --git a/arch/arm/include/asm/arch-socfpga/system_manager.h
b/arch/arm/include/asm/arch-socfpga/system_manager.h
new file mode 100644
index 0000000..ef9e464
--- /dev/null
+++ b/arch/arm/include/asm/arch-socfpga/system_manager.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright Altera Corporation (C) 2013. All rights reserved
+ *
+ * This program is free software; you can redistribute it
+ * and/or modify it under the terms and conditions of the
+ * GNU General Public License, version 2, as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program.  If not, see
+ * <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef	_SYSTEM_MANAGER_H_
+#define	_SYSTEM_MANAGER_H_
+
+#ifndef __ASSEMBLY__
+
+void sysmgr_pinmux_init(void);
+
+/* declaration for handoff table type */
+extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
+
+#endif
+
+
+#define CONFIG_SYSMGR_PINMUXGRP_OFFSET	(0x400)
+
+#endif /* _SYSTEM_MANAGER_H_ */
diff --git a/board/altera/socfpga_cyclone5/Makefile
b/board/altera/socfpga_cyclone5/Makefile
index 43bbc37..3092387 100644
--- a/board/altera/socfpga_cyclone5/Makefile
+++ b/board/altera/socfpga_cyclone5/Makefile
@@ -26,8 +26,10 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS	:= socfpga_cyclone5.o
+COBJS-y	:= socfpga_cyclone5.o
+COBJS-$(CONFIG_SPL_BUILD) += pinmux_config.o
 
+COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
 
diff --git a/include/configs/socfpga_cyclone5.h
b/include/configs/socfpga_cyclone5.h
index be3799b..dd6db9e 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -18,6 +18,7 @@
 #define __CONFIG_H
 
 #include <asm/arch/socfpga_base_addrs.h>
+#include "../../board/altera/socfpga_cyclone5/pinmux_config.h"
 
 /*
  * High level configuration
-- 
1.7.9.5