From: Axel Lin <axel.lin@ingics.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] gpio: spear_gpio: Fix gpio_set_value() implementation
Date: Mon, 16 Sep 2013 08:35:41 +0800 [thread overview]
Message-ID: <1379291741.13052.1.camel@phoenix> (raw)
In current gpio_set_value() implementation, it always sets the gpio control bit
no matter the value argument is 0 or 1. Thus the GPIOs never set to low.
This patch fixes this bug.
The address bus is used as a mask on read/write operations, so that independent
software drivers can set their GPIO bits without affecting any other pins in a
single write operation. Thus we don't need a read-modify-write to update the
register.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
---
v2: Update commit log to explain why a read-modify-write is not necessary
for clearing specific GPIO bit.
Also added Michael Trimarchi's reviewed-by tag since he does review the
patch and said the patch is fine.
drivers/gpio/spear_gpio.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/spear_gpio.c b/drivers/gpio/spear_gpio.c
index 367b670..6fb4117 100644
--- a/drivers/gpio/spear_gpio.c
+++ b/drivers/gpio/spear_gpio.c
@@ -36,7 +36,10 @@ int gpio_set_value(unsigned gpio, int value)
{
struct gpio_regs *regs = (struct gpio_regs *)CONFIG_GPIO_BASE;
- writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ if (value)
+ writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
+ else
+ writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]);
return 0;
}
--
1.8.1.2
next reply other threads:[~2013-09-16 0:35 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-16 0:35 Axel Lin [this message]
2014-07-04 21:47 ` [U-Boot] [PATCH v2] gpio: spear_gpio: Fix gpio_set_value() implementation Albert ARIBAUD
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