From: Scott Wood <scottwood@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [Patch v1 1/6] Driver/DDR: Moving Freescale DDR driver to a common driver
Date: Mon, 11 Nov 2013 12:49:53 -0600 [thread overview]
Message-ID: <1384195793.1403.2.camel@snotra.buserror.net> (raw)
In-Reply-To: <52AA82BF-D859-4A21-9CA7-BB646E8908FB@freescale.com>
On Fri, 2013-11-08 at 20:25 -0600, sun york-R58495 wrote:
> On Nov 8, 2013, at 4:48 PM, Scott Wood wrote:
>
> > On Wed, 2013-10-30 at 19:07 -0700, York Sun wrote:
> >>
> >> + CONFIG_SYS_FSL_DDR
> >> + Freescale DDR driver in use. This type of DDR controller is
> >> + found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
> >> + SoCs.
> >> +
> >> + CONFIG_SYS_FSL_DDR_ADDR
> >> + Freescale DDR memory-mapped register base.
> >> +
> >> + CONFIG_SYS_FSL_DDR_EMU
> >> + Specify emulator support for DDR. Some DDR features such as
> >> + deskew training are not available.
> >> +
> >> + CONFIG_SYS_FSL_DDR_PPC_GEN1
> >> + Freescale DDR1 controller.
> >> +
> >> + CONFIG_SYS_FSL_DDR_PPC_GEN2
> >> + Freescale DDR2 controller.
> >> +
> >> + CONFIG_SYS_FSL_DDR_PPC_GEN3
> >> + Freescale DDR3 controller.
> >
> > Why is there "PPC" in the name if this is to be common for PPC and ARM?
> > The description is more generic than the config symbol...
>
> This patch moves the DDR driver out of powerpc. I should deal with the common part for ARM and PPC later. Good point.
>
> >
> >> + CONFIG_FSL_DDR1
> >> + User config to use DDR1. It can be enabled for SoCs with
> >> + Freescale DDR1 or DDR2 controllers.
> >> +
> >> + CONFIG_FSL_DDR2
> >> + User config to use DDR2. It can be eanbeld for SoCs with
> >> + Freescale DDR2 or DDR3 controllers.
> >> +
> >> + CONFIG_FSL_DDR3
> >> + User config to use DDR3. It can be enabled for SoCs with
> >> + Freescale DDR3 controllers.
> >
> > How is this user config, rather than a description of the type of DDR
> > that is present?
>
> The DDR controller may support more than one type of memory. DDR2
> controllers support both DDR1 and DDR2, and some DDR3 controllers
> support both DDR2 and DDR3. It's user's option to choose which type of
> DDR devices to use. The driver needs to deal with them differently. You
> may argue the driver should detect them and choose the algorithm
> differently. But that will increase the code size considerably. It
> makes less sense to do so because once the board is designed, it is
> either this or that.
My point is that the type of DDR that is present is hardware
description, just as much as the type of DDR controller. "User config"
means things users can choose purely in software, without a
corresponding hardware change.
-Scott
next prev parent reply other threads:[~2013-11-11 18:49 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-31 2:07 [U-Boot] [Patch v1 0/6] Move Freescale DDR and IFC drivers to common drivers York Sun
2013-10-31 2:07 ` [U-Boot] [Patch v1 1/6] Driver/DDR: Moving Freescale DDR driver to a common driver York Sun
2013-11-09 0:48 ` Scott Wood
2013-11-09 2:25 ` york sun
2013-11-11 18:49 ` Scott Wood [this message]
2013-11-11 19:05 ` York Sun
2013-11-11 19:35 ` Scott Wood
2013-11-11 19:37 ` York Sun
2013-11-11 19:59 ` Scott Wood
2013-11-11 20:15 ` York Sun
2013-11-11 20:25 ` Scott Wood
2013-10-31 2:07 ` [U-Boot] [Patch v1 2/6] Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx York Sun
2013-10-31 2:07 ` [U-Boot] [Patch v1 3/6] Driver/DDR: Add Freescale DDR driver for ARM York Sun
2013-11-09 0:51 ` Scott Wood
2013-11-09 2:29 ` york sun
2013-10-31 2:07 ` [U-Boot] [Patch v1 4/6] powerpc/mpc8xxx: Extend DDR registers' fields York Sun
2013-10-31 2:07 ` [U-Boot] [Patch v1 5/6] Driver/DDR: Update DDR driver to allow non-zero base address York Sun
2013-10-31 2:07 ` [U-Boot] [Patch v1 6/6] Driver/IFC: Move Freescale IFC driver to a common driver York Sun
2013-10-31 3:27 ` Prabhakar Kushwaha
2013-11-09 0:44 ` Scott Wood
2013-11-09 0:52 ` Prabhakar Kushwaha
2013-11-09 1:00 ` Scott Wood
2013-11-11 11:13 ` Prabhakar Kushwaha
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