From: Fabio Estevam <festevam@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 2/2] mx6sabresd: Fix LVDS width and color format
Date: Wed, 4 Dec 2013 01:08:17 -0200 [thread overview]
Message-ID: <1386126497-15963-2-git-send-email-festevam@gmail.com> (raw)
In-Reply-To: <1386126497-15963-1-git-send-email-festevam@gmail.com>
From: Fabio Estevam <fabio.estevam@freescale.com>
mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.
Suggested-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v2:
- None
Changes since v1:
- None
board/freescale/mx6sabresd/mx6sabresd.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 1d5bba6..55e7961 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -294,15 +294,15 @@ static void enable_lvds(struct display_info_t const *dev)
struct iomuxc *iomux = (struct iomuxc *)
IOMUXC_BASE_ADDR;
u32 reg = readl(&iomux->gpr[2]);
- reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT |
- IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT;
+ reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
+ IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT;
writel(reg, &iomux->gpr[2]);
}
static struct display_info_t const displays[] = {{
.bus = -1,
.addr = 0,
- .pixfmt = IPU_PIX_FMT_LVDS666,
+ .pixfmt = IPU_PIX_FMT_RGB666,
.detect = NULL,
.enable = enable_lvds,
.mode = {
--
1.8.1.2
next prev parent reply other threads:[~2013-12-04 3:08 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-04 3:08 [U-Boot] [PATCH v3 1/2] mx6sabresd: Allow probing HSYNC, VSYNC and DISP_CLK signals Fabio Estevam
2013-12-04 3:08 ` Fabio Estevam [this message]
2013-12-17 17:45 ` [U-Boot] [PATCH v3 2/2] mx6sabresd: Fix LVDS width and color format Stefano Babic
2013-12-17 17:45 ` [U-Boot] [PATCH v3 1/2] mx6sabresd: Allow probing HSYNC, VSYNC and DISP_CLK signals Stefano Babic
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