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From: Scott Wood <scottwood@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3] mtd: move & update nand_ecclayout structure (plus board changes)
Date: Thu, 5 Dec 2013 10:05:19 -0600	[thread overview]
Message-ID: <1386259519.7375.13.camel@snotra.buserror.net> (raw)
In-Reply-To: <20131125152617.GW420@bill-the-cat>

On Mon, 2013-11-25 at 10:26 -0500, Tom Rini wrote:
> So, cam_enc_4xx (ARM) also fails to build with ELDK 5.2.1 (is fine with
> newer toolchains), so I dug into this patch to shrink things there.  But
> looking above, are all of these right?  It seems like generally we say
> OOBFREE=2, ECCPOS=56, except once you say OOBFREE=5 ECCPOS=56 and once
> OOBFREE=5 ECCPOS=256.  Are these really right and just 'odd' due to the
> chip used?

2/56 is the minimum based on layouts in generic code (until such a time
as we allow those to be configured out), but if a board enables a NAND
driver that specifies a layout with larger arrays, the values need to be
larger.  If the values specified are too small, you'll get a compiler
warning about too many elements in an array initializer.

> Also, Heiko, what should these values be for cam_enc_4xx?  Thanks!

It looks like 2/56 will work for that (davinci with
CONFIG_SYS_NAND_PAGE_2K but not
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC).  If I misread the ifdef flow,
then the compiler will let you know.  

CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC would require OOBFREE of at
least 4, and CONFIG_SYS_NAND_PAGE_4K would require ECCPOS of at least
80.

-Scott

      reply	other threads:[~2013-12-05 16:05 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-21  5:27 [U-Boot] [PATCH v3] mtd: move & update nand_ecclayout structure (plus board changes) Scott Wood
2013-11-21 10:42 ` Stefan Roese
2013-11-25 15:26 ` Tom Rini
2013-12-05 16:05   ` Scott Wood [this message]

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