From mboxrd@z Thu Jan 1 00:00:00 1970 From: Fabio Estevam Date: Thu, 19 Dec 2013 01:16:26 -0200 Subject: [U-Boot] [PATCH 3/6] mx6: soc: Set the VDDSOC at 1.175 V In-Reply-To: <1387422989-15307-1-git-send-email-festevam@gmail.com> References: <1387422989-15307-1-git-send-email-festevam@gmail.com> Message-ID: <1387422989-15307-3-git-send-email-festevam@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Fabio Estevam mx6 datasheet specifies that the minimum VDDSOC at 792 MHz is 1.15 V. Add a 25 mV margin and set it to 1.175V. This also matches the VDDSOC voltages for 792MHz operation that the kernel configures: http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/cpu_op-mx6.c?h=imx_3.0.35_4.1.0 Signed-off-by: Fabio Estevam --- arch/arm/cpu/armv7/mx6/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 13b9e36..0136eb0 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -151,7 +151,7 @@ int arch_cpu_init(void) { init_aips(); - set_vddsoc(1200); /* Set VDDSOC to 1.2V */ + set_vddsoc(1175); /* Set VDDSOC to 1.175V */ imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */ -- 1.8.1.2