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From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support
Date: Tue, 4 Mar 2014 17:49:49 -0600	[thread overview]
Message-ID: <1393976989.2475.1.camel@clsee-VirtualBox.altera.com> (raw)
In-Reply-To: <53106599.4060602@monstr.eu>

On Fri, 2014-02-28 at 11:31 +0100, Michal Simek wrote:
> On 02/27/2014 08:55 PM, Chin Liang See wrote:
> > Hi Michal,
> > 
> > On Mon, 2014-02-24 at 08:52 +0100, Michal Simek wrote:
> >> On 02/21/2014 09:57 PM, Chin Liang See wrote:
> >>> To enable the DesignWare watchdog support at SOCFPGA Cyclone V
> >>> dev kit.
> >>>
> >>> Signed-off-by: Chin Liang See <clsee@altera.com>
> >>> Cc: Anatolij Gustschin <agust@denx.de>
> >>> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> >>> Cc: Heiko Schocher <hs@denx.de>
> >>> Cc: Tom Rini <trini@ti.com>
> >>> ---
> >>> Changes for v3
> >>> - Split to 2 series patch
> >>> Changes for v2
> >>> - Enable this driver at socfpga_cyclone5 board
> >>> ---
> >>>  .../include/asm/arch-socfpga/socfpga_base_addrs.h  |    1 +
> >>>  include/configs/socfpga_cyclone5.h                 |   13 +++++++++++++
> >>>  2 files changed, 14 insertions(+)
> >>>
> >>> diff --git a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> >>> index 20f12e0..5f73824 100644
> >>> --- a/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> >>> +++ b/arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h
> >>> @@ -11,6 +11,7 @@
> >>>  #define SOCFPGA_UART0_ADDRESS 0xffc02000
> >>>  #define SOCFPGA_UART1_ADDRESS 0xffc03000
> >>>  #define SOCFPGA_OSC1TIMER0_ADDRESS 0xffd00000
> >>> +#define SOCFPGA_L4WD0_ADDRESS 0xffd02000
> >>>  #define SOCFPGA_CLKMGR_ADDRESS 0xffd04000
> >>>  #define SOCFPGA_RSTMGR_ADDRESS 0xffd05000
> >>>  #define SOCFPGA_SYSMGR_ADDRESS 0xffd08000
> >>> diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
> >>> index fc921ee..1b78ccb 100644
> >>> --- a/include/configs/socfpga_cyclone5.h
> >>> +++ b/include/configs/socfpga_cyclone5.h
> >>> @@ -207,6 +207,16 @@
> >>>  #define CONFIG_ENV_IS_NOWHERE
> >>>  
> >>>  /*
> >>> + * L4 Watchdog
> >>> + */
> >>
> >> Why multiline comment here?
> > 
> > Oh its just for easy reading.
> > 
> >>
> >>> +#define CONFIG_HW_WATCHDOG
> >>> +#define CONFIG_HW_WATCHDOG_TIMEOUT_MS	2000
> >>> +#define CONFIG_DESIGNWARE_WATCHDOG
> >>> +#define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
> >>
> >> Why not just use SOCFPGA_L4WD0_ADDRESS directly?
> > 
> > Nope, cause this driver might be used by other platform.
> 
> ok It means that SOCFPGA_L4WD0_ADDRESS is system controller right?

Its the base address for watchdog registers.

Thanks
Chin Liang

> 
> Thanks,
> Michal
> 

      reply	other threads:[~2014-03-04 23:49 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-21 20:57 [U-Boot] [PATCH v3 2/2] socfpga: Adding DesignWare watchdog support Chin Liang See
2014-02-24  7:52 ` Michal Simek
2014-02-27 19:55   ` Chin Liang See
2014-02-28 10:31     ` Michal Simek
2014-03-04 23:49       ` Chin Liang See [this message]

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