[U-Boot] [linux-sunxi] [PATCH v1 9/9] sunxi: add gmac Ethernet support

Chen-Yu Tsai
2014-03-14T11:11:25Z

On Fri, Mar 14, 2014 at 6:33 PM, Ian Campbell <ijc@hellion.org.uk> wrote:
> Based linux-sunxi#sunxi commit d854c4de2f57 "arm: Handle .gnu.hash section in
> ldscripts" vs v2014.01.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> Signed-off-by: Jens Kuske <jenskuske@gmail.com>
> Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
> ---
> arch/arm/cpu/armv7/sunxi/board.c | 15 +++++++++
> boards.cfg | 4 +--
> drivers/net/Makefile | 1 +
> drivers/net/sunxi_gmac.c | 34 ++++++++++++++++++++
> include/configs/sunxi-common.h | 68 ++++++++++++++++++++++++++++++++++++++++
> 5 files changed, 120 insertions(+), 2 deletions(-)
> create mode 100644 drivers/net/sunxi_gmac.c
[..]
> diff --git a/drivers/net/sunxi_gmac.c b/drivers/net/sunxi_gmac.c
> new file mode 100644
> index 0000000..432d7b2
> --- /dev/null
> +++ b/drivers/net/sunxi_gmac.c
> @@ -0,0 +1,34 @@
> +#include <common.h>
> +#include <netdev.h>
> +#include <miiphy.h>
> +#include <asm/gpio.h>
> +#include <asm/io.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/gpio.h>
> +
> +int sunxi_gmac_initialize(bd_t *bis)
> +{
> + int pin;
> + struct sunxi_ccm_reg *const ccm =
> + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
> +
> + /* Set up clock gating */
> + setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
> +
> + /* Set MII clock */
> + setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
> + CCM_GMAC_CTRL_GPIT_RGMII);
> +
> + /* Configure pin mux settings for GMAC */
> + for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
> + /* skip unused pins in RGMII mode */
> + if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
> + continue;
> + sunxi_gpio_set_cfgpin(pin, 5);
> + sunxi_gpio_set_drv(pin, 3);
> + }
> +
> + designware_initialize(0, SUNXI_GMAC_BASE, 0x1, PHY_INTERFACE_MODE_RGMII);

Hi,

Thanks for working on this!

I see you left out all the CONFIG_RGMII ifdefs from this file. Not
sure if it's because you're aiming to support only the Cubietruck
first. I think you should keep them in the same patch. You can then
just add the appropriate config options when support of other A20
boards roll in.

There are 3 changes to the designware driver since u-boot-sunxi's
last merge (2014.1-rc1):

50b0df8 net/designware: make driver compatible with data cache
92a190a net/designware - switch driver to phylib usage
74cb708 net/designware: add explicit reset of {tx|rx}_currdescnum

The move to phylib will likely break the current code. Maybe we could
merge 2014.4-rc1 in to fix it first.

Also, GMAC support depends on

5a51af3 net/designware: Reduce DMA burst length

by Jens Kuske (jemk). Neither of us bothered to send this upstream yet.

Cheers
ChenYu

> +
> + return 0;
> +}
[..]