From: Pekon Gupta <pekon@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v1 4/7] board/ti/am335x: add support for beaglebone NOR Cape
Date: Sat, 5 Jul 2014 00:35:14 +0530 [thread overview]
Message-ID: <1404500717-775-5-git-send-email-pekon@ti.com> (raw)
In-Reply-To: <1404500717-775-1-git-send-email-pekon@ti.com>
This patch updates pin-mux for beaglebone NOR cape [1]
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.
On Beaglebone, GPMC chip-select-0 is shared by both NAND and NOR capes,
so only one of them can be enabled at a time from board profile configs.
[1] http://elinux.org/Beagleboardtoys:BeagleBone_128Mb_16-Bit_NOR_Module
Signed-off-by: Pekon Gupta <pekon@ti.com>
---
board/ti/am335x/mux.c | 95 +++++++++++++++++++--------------------------------
1 file changed, 35 insertions(+), 60 deletions(-)
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index 439da4b..f6a9b29 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -200,73 +200,46 @@ static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLDOWN_EN)}, /* BE_CLE */
{-1},
};
-#endif
-#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)
+#elif defined(CONFIG_NOR)
static struct module_pin_mux bone_norcape_pin_mux[] = {
- {OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A0 */
- {OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A1 */
- {OFFSET(lcd_data2), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A2 */
- {OFFSET(lcd_data3), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A3 */
- {OFFSET(lcd_data4), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A4 */
- {OFFSET(lcd_data5), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A5 */
- {OFFSET(lcd_data6), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A6 */
- {OFFSET(lcd_data7), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A7 */
- {OFFSET(lcd_vsync), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A8 */
- {OFFSET(lcd_hsync), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A9 */
- {OFFSET(lcd_pclk), MODE(1)| PULLUDEN | RXACTIVE}, /* NOR_A10 */
- {OFFSET(lcd_ac_bias_en), MODE(1)| PULLUDEN | RXACTIVE}, /* NOR_A11 */
- {OFFSET(lcd_data8), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A12 */
- {OFFSET(lcd_data9), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A13 */
- {OFFSET(lcd_data10), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A14 */
- {OFFSET(lcd_data11), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A15 */
- {OFFSET(lcd_data12), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A16 */
- {OFFSET(lcd_data13), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A17 */
- {OFFSET(lcd_data14), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A18 */
- {OFFSET(lcd_data15), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A19 */
- {OFFSET(gpmc_ad0), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD0 */
- {OFFSET(gpmc_ad1), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD1 */
- {OFFSET(gpmc_ad2), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD2 */
- {OFFSET(gpmc_ad3), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD3 */
- {OFFSET(gpmc_ad4), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD4 */
- {OFFSET(gpmc_ad5), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD5 */
- {OFFSET(gpmc_ad6), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD6 */
- {OFFSET(gpmc_ad7), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD7 */
- {OFFSET(gpmc_ad8), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD8 */
- {OFFSET(gpmc_ad9), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD9 */
- {OFFSET(gpmc_ad10), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD10 */
- {OFFSET(gpmc_ad11), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD11 */
- {OFFSET(gpmc_ad12), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD12 */
- {OFFSET(gpmc_ad13), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD13 */
- {OFFSET(gpmc_ad14), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD14 */
- {OFFSET(gpmc_ad15), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD15 */
-
- {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN) | RXACTIVE}, /* NOR_CE */
- {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN) | RXACTIVE}, /* NOR_ADVN_ALE */
- {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN | RXACTIVE)},/* NOR_OE */
- {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN | RXACTIVE)},/* NOR_BE0N_CLE */
- {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN | RXACTIVE)}, /* NOR_WEN */
- {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUDEN)}, /* NOR WAIT */
+ {OFFSET(gpmc_ad0), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD0 */
+ {OFFSET(gpmc_ad1), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD1 */
+ {OFFSET(gpmc_ad2), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD2 */
+ {OFFSET(gpmc_ad3), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD3 */
+ {OFFSET(gpmc_ad4), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD4 */
+ {OFFSET(gpmc_ad5), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD5 */
+ {OFFSET(gpmc_ad6), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD6 */
+ {OFFSET(gpmc_ad7), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD7 */
+ {OFFSET(gpmc_ad8), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD8 */
+ {OFFSET(gpmc_ad9), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD9 */
+ {OFFSET(gpmc_ad10), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD10 */
+ {OFFSET(gpmc_ad11), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD11 */
+ {OFFSET(gpmc_ad12), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD12 */
+ {OFFSET(gpmc_ad13), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD13 */
+ {OFFSET(gpmc_ad14), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD14 */
+ {OFFSET(gpmc_ad15), MODE(0) | PULLUDDIS | RXACTIVE}, /* AD15 */
+ {OFFSET(gpmc_a0), MODE(0) | PULLUDDIS}, /* A0 */
+ {OFFSET(gpmc_a1), MODE(0) | PULLUDDIS}, /* A1 */
+ {OFFSET(gpmc_a2), MODE(0) | PULLUDDIS}, /* A2 */
+ {OFFSET(gpmc_a3), MODE(0) | PULLUDDIS}, /* A3 */
+ {OFFSET(gpmc_a4), MODE(0) | PULLUDDIS}, /* A4 */
+ {OFFSET(gpmc_a5), MODE(0) | PULLUDDIS}, /* A5 */
+ {OFFSET(gpmc_a6), MODE(0) | PULLUDDIS}, /* A6 */
+ {OFFSET(gpmc_a7), MODE(0) | PULLUDDIS}, /* A7 */
+ {OFFSET(gpmc_csn0), MODE(0) | PULLUDEN | PULLUP_EN}, /* CE */
+ {OFFSET(gpmc_advn_ale), MODE(0) | PULLUDEN | PULLDOWN_EN}, /* ALE */
+ {OFFSET(gpmc_oen_ren), MODE(0) | PULLUDEN | PULLDOWN_EN},/* OEn_REN */
+ {OFFSET(gpmc_be0n_cle), MODE(0) | PULLUDEN | PULLDOWN_EN},/* unused */
+ {OFFSET(gpmc_wen), MODE(0) | PULLUDEN | PULLDOWN_EN}, /* WEN */
+ {OFFSET(gpmc_wait0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},/*WAIT*/
{-1},
};
#endif
#if defined(CONFIG_NOR_BOOT)
-static struct module_pin_mux norboot_pin_mux[] = {
- {OFFSET(lcd_data1), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data2), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data3), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data4), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data5), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data6), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data7), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data8), MODE(1) | PULLUDDIS},
- {OFFSET(lcd_data9), MODE(1) | PULLUDDIS},
- {-1},
-};
-
void enable_norboot_pin_mux(void)
{
- configure_module_pin_mux(norboot_pin_mux);
+ configure_module_pin_mux(bone_norcape_pin_mux);
}
#endif
@@ -349,7 +322,7 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND)
configure_module_pin_mux(nand_pin_mux);
-#elif defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)
+#elif defined(CONFIG_NOR)
configure_module_pin_mux(bone_norcape_pin_mux);
#else
configure_module_pin_mux(mmc1_pin_mux);
@@ -393,6 +366,8 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND)
configure_module_pin_mux(nand_pin_mux);
+#elif defined(CONFIG_NOR)
+ configure_module_pin_mux(bone_norcape_pin_mux);
#else
configure_module_pin_mux(mmc1_pin_mux);
#endif
--
1.8.5.1.163.gd7aced9
next prev parent reply other threads:[~2014-07-04 19:05 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-04 19:05 [U-Boot] [PATCH v1 0/7] TI: armv7: add parallel NAND support Pekon Gupta
2014-07-04 19:05 ` [U-Boot] [PATCH v1 1/7] TI: armv7: move board specific NAND configs out from ti_armv7_common.h and ti_am335x_common.h Pekon Gupta
2014-07-14 21:30 ` Tom Rini
2014-07-04 19:05 ` [U-Boot] [PATCH v1 2/7] board/ti/am335x: add support for beaglebone NAND cape Pekon Gupta
2014-07-16 20:02 ` Tom Rini
2014-07-21 6:12 ` Gupta, Pekon
2014-07-04 19:05 ` [U-Boot] [PATCH v1 3/7] arm: lib: continue board_init_r even if valid flash device is not detected Pekon Gupta
2014-07-16 20:07 ` Tom Rini
2014-07-04 19:05 ` Pekon Gupta [this message]
2014-07-16 20:06 ` [U-Boot] [PATCH v1 4/7] board/ti/am335x: add support for beaglebone NOR Cape Tom Rini
2014-07-21 10:27 ` Gupta, Pekon
2014-07-04 19:05 ` [U-Boot] [PATCH v1 5/7] board/ti/am335x: update configs for parallel NAND Pekon Gupta
2014-07-04 19:05 ` [U-Boot] [PATCH v1 6/7] board/ti/am43xx: add support " Pekon Gupta
2014-07-16 20:14 ` Tom Rini
2014-07-04 19:05 ` [U-Boot] [PATCH v1 7/7] board/ti/dra7xx: " Pekon Gupta
2014-07-16 20:20 ` Tom Rini
2014-07-17 10:59 ` Gupta, Pekon
2014-07-17 12:57 ` Tom Rini
2014-07-06 7:35 ` [U-Boot] [PATCH v1 0/7] TI: armv7: add parallel NAND support Igor Grinberg
2014-07-07 6:35 ` Gupta, Pekon
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