From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chin Liang See <clsee@altera.com>
Date: Fri, 12 Sep 2014 01:10:22 -0500
Subject: [U-Boot] [PATCH] watchdog disable for socfpga
In-Reply-To: <20140909120328.GA20662@amd>
References: <CAE21AQp9TfUFjVSNQ33xRQ8HVNi2PxpLrEXHZjtzvrSgj1rAkg@mail.gmail.com>
	<20140514164258.GA10393@amd.pavel.ucw.cz>
	<201405150701.25786.manningc2@actrix.gen.nz>
	<1400229765.2030.4.camel@clsee-VirtualBox.altera.com>
	<20140527124032.GD15088@amd.pavel.ucw.cz>
	<20140527125030.GA29898@amd.pavel.ucw.cz> <E1XRH3e-0001qS-My@janus>
	<20140909112533.GA15404@amd> <20140909120328.GA20662@amd>
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To: u-boot@lists.denx.de

Hi Pavel,


On Tue, 2014-09-09 at 14:03 +0200, ZY - pavel wrote:
> This adds watchdog disable. It is neccessary for running Linux kernel.
> 
> Signed-off-by: Pavel Machek <pavel@denx.de>
> 
> diff --git a/arch/arm/cpu/armv7/socfpga/reset_manager.c b/arch/arm/cpu/armv7/socfpga/reset_manager.c
> index e320c01..5503059 100644
> --- a/arch/arm/cpu/armv7/socfpga/reset_manager.c
> +++ b/arch/arm/cpu/armv7/socfpga/reset_manager.c
> @@ -14,6 +14,19 @@ DECLARE_GLOBAL_DATA_PTR;
>  static const struct socfpga_reset_manager *reset_manager_base =
>  		(void *)SOCFPGA_RSTMGR_ADDRESS;
>  
> +#define RSTMGR_PERMODRST_L4WD0_LSB 6

Would suggest to put this into header file.
Thanks

Chin Liang

> +
> +/* Disable the watchdog (toggle reset to watchdog) */
> +void watchdog_disable(void)
> +{
> +	/* assert reset for watchdog */
> +	setbits_le32(&reset_manager_base->per_mod_reset,
> +		     (1<<RSTMGR_PERMODRST_L4WD0_LSB));
> +	/* deassert watchdog from reset (watchdog in not running state) */
> +	clrbits_le32(&reset_manager_base->per_mod_reset,
> +		     (1<<RSTMGR_PERMODRST_L4WD0_LSB));
> +}
> +
>  /*
>   * Write the reset manager register to cause reset
>   */
> diff --git a/arch/arm/include/asm/arch-socfpga/reset_manager.h b/arch/arm/include/asm/arch-socfpga/reset_manager.h
> index 3e95476..eb95c5b 100644
> --- a/arch/arm/include/asm/arch-socfpga/reset_manager.h
> +++ b/arch/arm/include/asm/arch-socfpga/reset_manager.h
> @@ -10,6 +10,8 @@
>  void reset_cpu(ulong addr);
>  void reset_deassert_peripherals_handoff(void);
>  
> +void watchdog_disable(void);
> +
>  struct socfpga_reset_manager {
>  	u32	status;
>  	u32	ctrl;
>