From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFCv2] mainline u-boot on socfpga
Date: Mon, 15 Sep 2014 02:12:41 -0500 [thread overview]
Message-ID: <1410765161.2763.9.camel@clsee-VirtualBox.altera.com> (raw)
In-Reply-To: <20140908120845.GA19660@amd>
Hi Pavel,
On Mon, 2014-09-08 at 14:08 +0200, ZY - pavel wrote:
> Hi!
>
> I know coding style leaves something to be desired.
>
> But.. it recognizes MMC/ethernet, and can load linux kernel.
>
> Unfortunately, 1MB of memory at 0 is not available for some reason;
> but linux works ok if you avoid that area.
>
The lowest 1MB region is configurable based on the ARM interconnect
NIC-301 / L3REGS setting. I saw in this patch, there is a code which
setup the PL310 / L2 controller address filter start address. This code
will convert the lowest 1MB region as SDRAM. If the next 1MB memory is
working, the lowest 1MB should work too.
At same time, I noticed that the L2 controller address filter start
address configuration is done at cpu_eth_init. I am wonder the failure
you spotted is happening before this function is called?
Chin Liang
next prev parent reply other threads:[~2014-09-15 7:12 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-03 19:34 [U-Boot] [RFC] mainline u-boot on socfpga Pavel Machek
2014-09-08 12:08 ` [U-Boot] [RFCv2] " Pavel Machek
2014-09-08 12:35 ` Michal Simek
2014-09-15 7:12 ` Chin Liang See [this message]
2014-09-15 7:31 ` Chin Liang See
2014-09-15 8:34 ` Pavel Machek
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