From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 04/51] net: dwc: Make the cache handling less cryptic
Date: Wed, 1 Oct 2014 02:35:24 -0500 [thread overview]
Message-ID: <1412148924.11125.7.camel@clsee-VirtualBox.altera.com> (raw)
In-Reply-To: <1411304339-11348-5-git-send-email-marex@denx.de>
On Sun, 2014-09-21 at 14:58 +0200, marex at denx.de wrote:
> Add a few new variables to make the cache handling less cryptic.
> Add a variable for DMA and DATA descriptor start and end, so the
> correctness of the code is easier to inspect.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@altera.com>
> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> Cc: Tom Rini <trini@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Joe Hershberger <joe.hershberger@gmail.com>
> Acked-by: Pavel Machek <pavel@denx.de>
> ---
> drivers/net/designware.c | 48 +++++++++++++++++++++++-------------------------
> 1 file changed, 23 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
> index aaf146d..9ded895 100644
> --- a/drivers/net/designware.c
> +++ b/drivers/net/designware.c
> @@ -279,19 +279,21 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
> struct eth_dma_regs *dma_p = priv->dma_regs_p;
> u32 desc_num = priv->tx_currdescnum;
> struct dmamacdescr *desc_p = &priv->tx_mac_descrtable[desc_num];
> -
> + uint32_t desc_start = (uint32_t)desc_p;
> + uint32_t desc_end = desc_start +
> + roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
> + uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
> + uint32_t data_end = data_start +
> + roundup(length, ARCH_DMA_MINALIGN);
> /*
> * Strictly we only need to invalidate the "txrx_status" field
> * for the following check, but on some platforms we cannot
> - * invalidate only 4 bytes, so roundup to
> - * ARCH_DMA_MINALIGN. This is safe because the individual
> - * descriptors in the array are each aligned to
> - * ARCH_DMA_MINALIGN.
> + * invalidate only 4 bytes, so we flush the entire descriptor,
> + * which is 16 bytes in total. This is safe because the
> + * individual descriptors in the array are each aligned to
> + * ARCH_DMA_MINALIGN and padded appropriately.
> */
> - invalidate_dcache_range(
> - (unsigned long)desc_p,
> - (unsigned long)desc_p +
> - roundup(sizeof(desc_p->txrx_status), ARCH_DMA_MINALIGN));
> + invalidate_dcache_range(desc_start, desc_end);
>
> /* Check if the descriptor is owned by CPU */
> if (desc_p->txrx_status & DESC_TXSTS_OWNBYDMA) {
> @@ -299,12 +301,10 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
> return -1;
> }
>
> - memcpy((void *)desc_p->dmamac_addr, packet, length);
> + memcpy(desc_p->dmamac_addr, packet, length);
>
> /* Flush data to be sent */
> - flush_dcache_range((unsigned long)desc_p->dmamac_addr,
> - (unsigned long)desc_p->dmamac_addr +
> - roundup(length, ARCH_DMA_MINALIGN));
> + flush_dcache_range(data_start, data_end);
>
> #if defined(CONFIG_DW_ALTDESCRIPTOR)
> desc_p->txrx_status |= DESC_TXSTS_TXFIRST | DESC_TXSTS_TXLAST;
> @@ -322,8 +322,7 @@ static int dw_eth_send(struct eth_device *dev, void *packet, int length)
> #endif
>
> /* Flush modified buffer descriptor */
> - flush_dcache_range((unsigned long)desc_p,
> - (unsigned long)desc_p + sizeof(struct dmamacdescr));
> + flush_dcache_range(desc_start, desc_end);
>
> /* Test the wrap-around condition. */
> if (++desc_num >= CONFIG_TX_DESCR_NUM)
> @@ -343,11 +342,14 @@ static int dw_eth_recv(struct eth_device *dev)
> u32 status, desc_num = priv->rx_currdescnum;
> struct dmamacdescr *desc_p = &priv->rx_mac_descrtable[desc_num];
> int length = 0;
> + uint32_t desc_start = (uint32_t)desc_p;
> + uint32_t desc_end = desc_start +
> + roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
> + uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
> + uint32_t data_end;
>
> /* Invalidate entire buffer descriptor */
> - invalidate_dcache_range((unsigned long)desc_p,
> - (unsigned long)desc_p +
> - sizeof(struct dmamacdescr));
> + invalidate_dcache_range(desc_start, desc_end);
>
> status = desc_p->txrx_status;
>
> @@ -358,9 +360,8 @@ static int dw_eth_recv(struct eth_device *dev)
> DESC_RXSTS_FRMLENSHFT;
>
> /* Invalidate received data */
> - invalidate_dcache_range((unsigned long)desc_p->dmamac_addr,
> - (unsigned long)desc_p->dmamac_addr +
> - roundup(length, ARCH_DMA_MINALIGN));
> + data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
> + invalidate_dcache_range(data_start, data_end);
>
> NetReceive(desc_p->dmamac_addr, length);
>
> @@ -371,10 +372,7 @@ static int dw_eth_recv(struct eth_device *dev)
> desc_p->txrx_status |= DESC_RXSTS_OWNBYDMA;
>
> /* Flush only status field - others weren't changed */
> - flush_dcache_range((unsigned long)&desc_p->txrx_status,
> - (unsigned long)&desc_p->txrx_status +
> - roundup(sizeof(desc_p->txrx_status),
> - ARCH_DMA_MINALIGN));
> + flush_dcache_range(desc_start, desc_end);
>
> /* Test the wrap-around condition. */
> if (++desc_num >= CONFIG_RX_DESCR_NUM)
Acked-by: Chin Liang See <clsee@altera.com>
next prev parent reply other threads:[~2014-10-01 7:35 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-21 12:58 [U-Boot] [PATCH 00/51] arm: socfpga: Usability fixes Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH V2 01/51] net: Remove unused CONFIG_DW_SEARCH_PHY from configs Marek Vasut
2014-10-01 6:50 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 02/51] net: phy: Cleanup drivers/net/phy/micrel.c Marek Vasut
2014-10-01 6:57 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 03/51] net: dwc: Fix cache alignment issues Marek Vasut
2014-10-01 7:23 ` Chin Liang See
2014-10-01 11:21 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 04/51] net: dwc: Make the cache handling less cryptic Marek Vasut
2014-10-01 7:35 ` Chin Liang See [this message]
2014-09-21 12:58 ` [U-Boot] [PATCH 05/51] mmc: dw_mmc: cleanups Marek Vasut
2014-10-01 7:40 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 06/51] mmc: dw_mmc: Fix cache alignment issue Marek Vasut
2014-10-01 9:45 ` Chin Liang See
2014-10-01 11:30 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 07/51] tools: socfpga: Add socfpga preloader signing to mkimage Marek Vasut
2014-10-01 10:10 ` Chin Liang See
2014-10-01 11:51 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 08/51] arm: socfpga: Complete the list of base addresses Marek Vasut
2014-10-01 10:19 ` Chin Liang See
2014-10-01 11:54 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 09/51] arm: socfpga: Clean up base address file Marek Vasut
2014-10-01 10:30 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH V2 10/51] arm: socfpga: Add watchdog disable for socfpga Marek Vasut
2014-10-01 10:50 ` Chin Liang See
2014-10-01 12:07 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 11/51] arm: socfpga: sysmgr: Clean up system manager Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 12/51] arm: socfpga: clock: Implant order into bit definitions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 13/51] arm: socfpga: clock: Drop nonsense inlining from clock manager code Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 14/51] arm: socfpga: clock: Add missing stubs into board file Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH V2 15/51] arm: socfpga: clock: Add code to read clock configuration Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 16/51] arm: socfpga: clock: Trim down code duplication Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 17/51] arm: socfpga: clock: Clean up bit definitions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 18/51] arm: socfpga: clock: Sync with reference code Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 19/51] arm: socfpga: mmc: Pick the clock from clock manager Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 20/51] arm: socfpga: timer: Pull the timer reload value from config file Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 21/51] arm: socfpga: reset: Add EMAC reset functions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 22/51] arm: socfpga: misc: Add proper ethernet initialization Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 23/51] arm: socfpga: misc: Add SD controller init Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 24/51] arm: socfpga: misc: Align print_cpuinfo() output Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 25/51] arm: socfpga: board: Correctly set ATAG position Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 26/51] arm: socfpga: board: Align checkboard() output Marek Vasut
2014-09-21 13:11 ` [U-Boot] [PATCH 27/51] fpga: altera: Clean up the printing and debug Marek Vasut
2014-09-24 12:46 ` Michal Simek
2014-09-24 13:22 ` Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 28/51] fpga: altera: Clean up altera_validate function Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 29/51] fpga: altera: More indentation trimdown Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 30/51] fpga: altera: Move altera_validate to the top Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 31/51] fpga: altera: Make altera_validate return normal values Marek Vasut
2014-09-22 9:16 ` Pavel Machek
2014-09-22 9:36 ` Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 32/51] fpga: altera: Clean up enums in altera.h Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 33/51] fpga: altera: Turn the switches into table lookup Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH V2 34/51] arm: socfpga: fpga: Add SoCFPGA FPGA programming interface Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 35/51] arm: socfpga: reset: Add function to reset FPGA bridges Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 36/51] arm: socfpga: sysmgr: Add FPGA bits into system manager Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 37/51] arm: cache: Add support for write-allocate D-Cache Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 38/51] arm: socfpga: cache: Define cacheline size Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 39/51] arm: socfpga: cache: Enable D-Cache Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 40/51] arm: socfpga: cache: Enable PL310 L2 cache Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 41/51] arm: socfpga: scu: Add SCU register file Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 42/51] arm: socfpga: nic301: Add NIC-301 GPV " Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 43/51] arm: socfpga: pl310: Map SDRAM to 0x0 Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 44/51] arm: socfpga: nic301: Add NIC-301 configuration code Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 45/51] arm: socfpga: Enable DWMMC for SOCFPGA Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 46/51] arm: socfpga: Enable SDMMC boot for SOCFPGA U-Boot Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 47/51] arm: socfpga: Move cache_enable to CPU code Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 48/51] arm: socfpga: Add command to control HPS-FPGA bridges Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 49/51] arm: socfpga: Clean up SoCFPGA configuration Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 50/51] arm: socfpga: Split " Marek Vasut
2014-09-24 14:10 ` Dinh Nguyen
2014-09-24 15:38 ` Pavel Machek
2014-09-25 14:45 ` Marek Vasut
2014-09-25 14:43 ` Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 51/51] arm: socfpga: Use CMD_FS_GENERIC Marek Vasut
2014-09-24 13:38 ` Michal Simek
2014-09-22 9:13 ` [U-Boot] [PATCH 28/51] fpga: altera: Clean up altera_validate function Pavel Machek
2014-09-23 15:15 ` [U-Boot] [PATCH 00/51] arm: socfpga: Usability fixes Stefan Roese
2014-09-29 11:12 ` Pavel Machek
2014-09-29 22:54 ` Marek Vasut
2014-10-01 6:18 ` Chin Liang See
2014-10-01 11:13 ` Marek Vasut
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