public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: Chin Liang See <clsee@altera.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 07/51] tools: socfpga: Add socfpga preloader signing to mkimage
Date: Wed, 1 Oct 2014 05:10:47 -0500	[thread overview]
Message-ID: <1412158247.11125.18.camel@clsee-VirtualBox.altera.com> (raw)
In-Reply-To: <1411304339-11348-8-git-send-email-marex@denx.de>

Hi Charles,

On Sun, 2014-09-21 at 14:58 +0200, marex at denx.de wrote:
> From: Charles Manning <cdhmanning@gmail.com>
> 
> Like many platforms, the Altera socfpga platform requires that the
> preloader be "signed" in a certain way or the built-in boot ROM will
> not boot the code.
> 
> This change automatically creates an appropriately signed preloader
> from an SPL image.
> 
> The signed image includes a CRC which must, of course, be generated
> with a CRC generator that the SoCFPGA boot ROM agrees with otherwise
> the boot ROM will reject the image.
> 
> Unfortunately the CRC used in this boot ROM is not the same as the
> Adler CRC in lib/crc32.c. Indeed the Adler code is not technically a
> CRC but is more correctly described as a checksum.
> 
> Thus, the appropriate CRC generator is added to lib/ as crc32_alt.c.
> 
> Signed-off-by: Charles Manning <cdhmanning@gmail.com>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@altera.com>
> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> Cc: Tom Rini <trini@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Pavel Machek <pavel@denx.de>
> ---
>  common/image.c       |   1 +
>  include/image.h      |   1 +
>  tools/Makefile       |   1 +
>  tools/imagetool.c    |   2 +
>  tools/imagetool.h    |   1 +
>  tools/socfpgaimage.c | 255 +++++++++++++++++++++++++++++++++++++++++++++++++++
>  6 files changed, 261 insertions(+)
>  create mode 100644 tools/socfpgaimage.c
> 
> diff --git a/common/image.c b/common/image.c
> index 38b56e3..085771c 100644
> --- a/common/image.c
> +++ b/common/image.c
> @@ -138,6 +138,7 @@ static const table_entry_t uimage_type[] = {
>  	{	IH_TYPE_PBLIMAGE,   "pblimage",   "Freescale PBL Boot Image",},
>  	{	IH_TYPE_RAMDISK,    "ramdisk",	  "RAMDisk Image",	},
>  	{	IH_TYPE_SCRIPT,     "script",	  "Script",		},
> +	{	IH_TYPE_SOCFPGAIMAGE, "socfpgaimage", "Altera SOCFPGA preloader",},
>  	{	IH_TYPE_STANDALONE, "standalone", "Standalone Program", },
>  	{	IH_TYPE_UBLIMAGE,   "ublimage",   "Davinci UBL image",},
>  	{	IH_TYPE_MXSIMAGE,   "mxsimage",   "Freescale MXS Boot Image",},
> diff --git a/include/image.h b/include/image.h
> index 3401056..4347532 100644
> --- a/include/image.h
> +++ b/include/image.h
> @@ -232,6 +232,7 @@ struct lmb;
>  #define IH_TYPE_MXSIMAGE	16	/* Freescale MXSBoot Image	*/
>  #define IH_TYPE_GPIMAGE		17	/* TI Keystone GPHeader Image	*/
>  #define IH_TYPE_ATMELIMAGE	18	/* ATMEL ROM bootable Image	*/
> +#define IH_TYPE_SOCFPGAIMAGE	19	/* Altera SOCFPGA Preloader	*/
>  
>  /*
>   * Compression Types
> diff --git a/tools/Makefile b/tools/Makefile
> index 90e966d..2b05b20 100644
> --- a/tools/Makefile
> +++ b/tools/Makefile
> @@ -87,6 +87,7 @@ dumpimage-mkimage-objs := aisimage.o \
>  			os_support.o \
>  			pblimage.o \
>  			pbl_crc32.o \
> +			socfpgaimage.o \
>  			lib/sha1.o \
>  			lib/sha256.o \
>  			ublimage.o \
> diff --git a/tools/imagetool.c b/tools/imagetool.c
> index 32d6278..98717bd 100644
> --- a/tools/imagetool.c
> +++ b/tools/imagetool.c
> @@ -47,6 +47,8 @@ void register_image_tool(imagetool_register_t image_register)
>  	init_ubl_image_type();
>  	/* Init Davinci AIS support */
>  	init_ais_image_type();
> +	/* Init Altera SOCFPGA support */
> +	init_socfpga_image_type();
>  	/* Init TI Keystone boot image generation/list support */
>  	init_gpimage_type();
>  }
> diff --git a/tools/imagetool.h b/tools/imagetool.h
> index c8af0e8..8bce059 100644
> --- a/tools/imagetool.h
> +++ b/tools/imagetool.h
> @@ -168,6 +168,7 @@ void init_mxs_image_type(void);
>  void init_fit_image_type(void);
>  void init_ubl_image_type(void);
>  void init_omap_image_type(void);
> +void init_socfpga_image_type(void);
>  void init_gpimage_type(void);
>  
>  void pbl_load_uboot(int fd, struct image_tool_params *mparams);
> diff --git a/tools/socfpgaimage.c b/tools/socfpgaimage.c
> new file mode 100644
> index 0000000..32fa09f
> --- /dev/null
> +++ b/tools/socfpgaimage.c
> @@ -0,0 +1,255 @@
> +/*
> + * Copyright (C) 2014 Charles Manning <cdhmanning@gmail.com>
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + *
> + * Reference doc http://www.altera.com.cn/literature/hb/cyclone-v/cv_5400A.pdf
> + * Note this doc is not entirely accurate. Of particular interest to us is the
> + * "header" length field being in U32s and not bytes.
> + *
> + * "Header" is a structure of the following format.
> + * this is positioned at 0x40.
> + *
> + * Endian is LSB.
> + *
> + * Offset   Length   Usage
> + * -----------------------
> + *   0x40        4   Validation word 0x31305341
> + *   0x44        1   Version (whatever, zero is fine)
> + *   0x45        1   Flags   (unused, zero is fine)
> + *   0x46        2   Length  (in units of u32, including the end checksum).
> + *   0x48        2   Zero
> + *   0x4A        2   Checksum over the header. NB Not CRC32
> + *
> + * At the end of the code we have a 32-bit CRC checksum over whole binary
> + * excluding the CRC.
> + *
> + * Note that the CRC used here is **not** the zlib/Adler crc32. It is the
> + * CRC-32 used in bzip2, ethernet and elsewhere.
> + *
> + * The image is padded out to 64k, because that is what is
> + * typically used to write the image to the boot medium.
> + */
> +
> +#include "pbl_crc32.h"

Seems I cannot find this file


> +#include "imagetool.h"
> +#include <image.h>
> +
> +#define HEADER_OFFSET	0x40
> +#define HEADER_SIZE	0xC

Unused


> +#define VALIDATION_WORD	0x31305341
> +#define PADDED_SIZE	0x10000
> +
> +/* To allow for adding CRC, the max input size is a bit smaller. */
> +#define MAX_INPUT_SIZE	(PADDED_SIZE - sizeof(uint32_t))
> +
> +static uint8_t buffer[PADDED_SIZE];
> +
> +static struct {
> +	uint32_t validation;
> +	uint8_t  version;
> +	uint8_t  flags;
> +	uint16_t length_u32;
> +	uint16_t zero;
> +	uint16_t checksum;
> +} header;
> +
> +/*
> + * The header checksum is just a very simple checksum over
> + * the header area.
> + * There is still a crc32 over the whole lot.
> + */
> +static uint16_t hdr_checksum(const uint8_t *buf, int len)
> +{
> +	uint16_t ret = 0;
> +	int i;
> +
> +	for (i = 0; i < len; i++) {
> +		ret += (((uint16_t) *buf) & 0xff);
> +		buf++;
> +	}
> +	return ret;
> +}
> +
> +
> +static void build_header(uint8_t *buf,
> +			  uint8_t version,
> +			  uint8_t flags,
> +			  uint16_t length_bytes)
> +{
> +	header.validation = htole32(VALIDATION_WORD);
> +	header.version = version;
> +	header.flags = flags;
> +	header.length_u32 = htole16(length_bytes/4);
> +	header.zero = 0;
> +	header.checksum = htole16(hdr_checksum((const uint8_t *)&header, 10));

Seems 10 is a magic number here.
Suggest to use sizeof(header) - sizeof(header.checksum)


> +
> +	memcpy(buf, &header, sizeof(header));
> +}
> +
> +/*
> + * Perform a rudimentary verification of header and return
> + * size of image.
> + */
> +static int verify_header(const uint8_t *buf)
> +{
> +	memcpy(&header, buf, sizeof(header));
> +
> +	if (le32toh(header.validation) != VALIDATION_WORD)
> +		return -1;
> +	if (le16toh(header.checksum) !=
> +	    hdr_checksum((const uint8_t *)&header, 10))

Ditto

> +		return -1;
> +
> +	return le16toh(header.length_u32) * 4;
> +}
> +
> +/* Sign the buffer and return the signed buffer size */
> +static int sign_buffer(uint8_t *buf,
> +			uint8_t version, uint8_t flags,
> +			int len, int pad_64k)
> +{
> +	uint32_t calc_crc;
> +
> +	/* Align the length up */
> +	len = (len + 3) & (~3);
> +
> +	/* Build header, adding 4 bytes to length to hold the CRC32. */
> +	build_header(buf + HEADER_OFFSET,  version, flags, len + 4);
> +
> +	/* Calculate and apply the CRC */
> +	calc_crc = ~pbl_crc32(0, (char *)buf, len);
> +

For this, we can reuse the lib/bzlib_private.h

	/* Calculate and apply the CRC */
	BZ_INITIALISE_CRC(calc_crc);
	while (len--) {
		BZ_UPDATE_CRC(calc_crc, *buf);
		buf++;
	}
	calc_crc ^= ~0;


> +	*((uint32_t *)(buf + len)) = htole32(calc_crc);
> +
> +	if (!pad_64k)
> +		return len + 4;
> +
> +	return PADDED_SIZE;
> +}
> +
> +/* Verify that the buffer looks sane */
> +static int verify_buffer(const uint8_t *buf)
> +{
> +	int len; /* Including 32bit CRC */
> +	uint32_t calc_crc;
> +	uint32_t buf_crc;
> +
> +	len = verify_header(buf + HEADER_OFFSET);
> +	if (len < 0)
> +		return -1;
> +	if (len < HEADER_OFFSET || len > PADDED_SIZE)
> +		return -1;

Suggest to have some printout to indicate failure type


> +
> +	/*
> +	 * Adjust length to the base of the CRC.
> +	 * Check the CRC.
> +	*/
> +	len -= 4;
> +
> +	calc_crc = ~pbl_crc32(0, (const char *)buf, len);
> +

Ditto

> +	buf_crc = le32toh(*((uint32_t *)(buf + len)));
> +
> +	if (buf_crc != calc_crc)
> +		return -1;
> +

Suggest to have some printout to indicate failure type


> +	return 0;
> +}
> +
> +/* mkimage glue functions */
> +static int socfpgaimage_verify_header(unsigned char *ptr, int image_size,
> +			struct image_tool_params *params)
> +{
> +	if (image_size != PADDED_SIZE)
> +		return -1;
> +
> +	return verify_buffer(ptr);
> +}
> +
> +static void socfpgaimage_print_header(const void *ptr)
> +{
> +	if (verify_buffer(ptr) == 0)
> +		printf("Looks like a sane SOCFPGA preloader\n");
> +	else
> +		printf("Not a sane SOCFPGA preloader\n");
> +}
> +
> +static int socfpgaimage_check_params(struct image_tool_params *params)
> +{
> +	/* Not sure if we should be accepting fflags */
> +	return	(params->dflag && (params->fflag || params->lflag)) ||
> +		(params->fflag && (params->dflag || params->lflag)) ||
> +		(params->lflag && (params->dflag || params->fflag));
> +}
> +
> +static int socfpgaimage_check_image_types(uint8_t type)
> +{
> +	if (type == IH_TYPE_SOCFPGAIMAGE)
> +		return EXIT_SUCCESS;
> +	return EXIT_FAILURE;
> +}
> +
> +/*
> + * To work in with the mkimage framework, we do some ugly stuff...
> + *
> + * First, socfpgaimage_vrec_header() is called.
> + * We prepend a fake header big enough to make the file PADDED_SIZE.
> + * This gives us enough space to do what we want later.
> + *
> + * Next, socfpgaimage_set_header() is called.
> + * We fix up the buffer by moving the image to the start of the buffer.
> + * We now have some room to do what we need (add CRC and padding).
> + */
> +
> +static int data_size;
> +#define FAKE_HEADER_SIZE (PADDED_SIZE - data_size)
> +
> +static int socfpgaimage_vrec_header(struct image_tool_params *params,
> +				struct image_type_params *tparams)
> +{
> +	struct stat sbuf;
> +
> +	if (params->datafile &&
> +	    stat(params->datafile, &sbuf) == 0 &&
> +	    sbuf.st_size <= MAX_INPUT_SIZE) {
> +		data_size = sbuf.st_size;
> +		tparams->header_size = FAKE_HEADER_SIZE;
> +	}
> +	return 0;
> +}
> +
> +static void socfpgaimage_set_header(void *ptr, struct stat *sbuf, int ifd,
> +				struct image_tool_params *params)
> +{
> +	uint8_t *buf = (uint8_t *)ptr;
> +
> +	/*
> +	 * This function is called after vrec_header() has been called.
> +	 * At this stage we have the FAKE_HEADER_SIZE dummy bytes followed by
> +	 * data_size image bytes. Total = PADDED_SIZE.
> +	 * We need to fix the buffer by moving the image bytes back to
> +	 * the beginning of the buffer, then actually do the signing stuff...
> +	 */
> +	memmove(buf, buf + FAKE_HEADER_SIZE, data_size);
> +	memset(buf + data_size, 0, FAKE_HEADER_SIZE);
> +
> +	sign_buffer(buf, 0, 0, data_size, 0);
> +}
> +
> +static struct image_type_params socfpgaimage_params = {
> +	.name		= "Altera SOCFPGA preloader support",
> +	.vrec_header	= socfpgaimage_vrec_header,
> +	.header_size	= 0, /* This will be modified by vrec_header() */
> +	.hdr		= (void *)buffer,
> +	.check_image_type = socfpgaimage_check_image_types,
> +	.verify_header	= socfpgaimage_verify_header,
> +	.print_header	= socfpgaimage_print_header,
> +	.set_header	= socfpgaimage_set_header,
> +	.check_params	= socfpgaimage_check_params,
> +};
> +
> +void init_socfpga_image_type(void)
> +{
> +	register_image_type(&socfpgaimage_params);
> +}

  reply	other threads:[~2014-10-01 10:10 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-21 12:58 [U-Boot] [PATCH 00/51] arm: socfpga: Usability fixes Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH V2 01/51] net: Remove unused CONFIG_DW_SEARCH_PHY from configs Marek Vasut
2014-10-01  6:50   ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 02/51] net: phy: Cleanup drivers/net/phy/micrel.c Marek Vasut
2014-10-01  6:57   ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 03/51] net: dwc: Fix cache alignment issues Marek Vasut
2014-10-01  7:23   ` Chin Liang See
2014-10-01 11:21     ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 04/51] net: dwc: Make the cache handling less cryptic Marek Vasut
2014-10-01  7:35   ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 05/51] mmc: dw_mmc: cleanups Marek Vasut
2014-10-01  7:40   ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 06/51] mmc: dw_mmc: Fix cache alignment issue Marek Vasut
2014-10-01  9:45   ` Chin Liang See
2014-10-01 11:30     ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 07/51] tools: socfpga: Add socfpga preloader signing to mkimage Marek Vasut
2014-10-01 10:10   ` Chin Liang See [this message]
2014-10-01 11:51     ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 08/51] arm: socfpga: Complete the list of base addresses Marek Vasut
2014-10-01 10:19   ` Chin Liang See
2014-10-01 11:54     ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 09/51] arm: socfpga: Clean up base address file Marek Vasut
2014-10-01 10:30   ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH V2 10/51] arm: socfpga: Add watchdog disable for socfpga Marek Vasut
2014-10-01 10:50   ` Chin Liang See
2014-10-01 12:07     ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 11/51] arm: socfpga: sysmgr: Clean up system manager Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 12/51] arm: socfpga: clock: Implant order into bit definitions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 13/51] arm: socfpga: clock: Drop nonsense inlining from clock manager code Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 14/51] arm: socfpga: clock: Add missing stubs into board file Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH V2 15/51] arm: socfpga: clock: Add code to read clock configuration Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 16/51] arm: socfpga: clock: Trim down code duplication Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 17/51] arm: socfpga: clock: Clean up bit definitions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 18/51] arm: socfpga: clock: Sync with reference code Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 19/51] arm: socfpga: mmc: Pick the clock from clock manager Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 20/51] arm: socfpga: timer: Pull the timer reload value from config file Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 21/51] arm: socfpga: reset: Add EMAC reset functions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 22/51] arm: socfpga: misc: Add proper ethernet initialization Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 23/51] arm: socfpga: misc: Add SD controller init Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 24/51] arm: socfpga: misc: Align print_cpuinfo() output Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 25/51] arm: socfpga: board: Correctly set ATAG position Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 26/51] arm: socfpga: board: Align checkboard() output Marek Vasut
2014-09-21 13:11 ` [U-Boot] [PATCH 27/51] fpga: altera: Clean up the printing and debug Marek Vasut
2014-09-24 12:46   ` Michal Simek
2014-09-24 13:22     ` Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 28/51] fpga: altera: Clean up altera_validate function Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 29/51] fpga: altera: More indentation trimdown Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 30/51] fpga: altera: Move altera_validate to the top Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 31/51] fpga: altera: Make altera_validate return normal values Marek Vasut
2014-09-22  9:16     ` Pavel Machek
2014-09-22  9:36       ` Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 32/51] fpga: altera: Clean up enums in altera.h Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 33/51] fpga: altera: Turn the switches into table lookup Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH V2 34/51] arm: socfpga: fpga: Add SoCFPGA FPGA programming interface Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 35/51] arm: socfpga: reset: Add function to reset FPGA bridges Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 36/51] arm: socfpga: sysmgr: Add FPGA bits into system manager Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 37/51] arm: cache: Add support for write-allocate D-Cache Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 38/51] arm: socfpga: cache: Define cacheline size Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 39/51] arm: socfpga: cache: Enable D-Cache Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 40/51] arm: socfpga: cache: Enable PL310 L2 cache Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 41/51] arm: socfpga: scu: Add SCU register file Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 42/51] arm: socfpga: nic301: Add NIC-301 GPV " Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 43/51] arm: socfpga: pl310: Map SDRAM to 0x0 Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 44/51] arm: socfpga: nic301: Add NIC-301 configuration code Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 45/51] arm: socfpga: Enable DWMMC for SOCFPGA Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 46/51] arm: socfpga: Enable SDMMC boot for SOCFPGA U-Boot Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 47/51] arm: socfpga: Move cache_enable to CPU code Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 48/51] arm: socfpga: Add command to control HPS-FPGA bridges Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 49/51] arm: socfpga: Clean up SoCFPGA configuration Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 50/51] arm: socfpga: Split " Marek Vasut
2014-09-24 14:10     ` Dinh Nguyen
2014-09-24 15:38       ` Pavel Machek
2014-09-25 14:45         ` Marek Vasut
2014-09-25 14:43       ` Marek Vasut
2014-09-21 13:12   ` [U-Boot] [PATCH 51/51] arm: socfpga: Use CMD_FS_GENERIC Marek Vasut
2014-09-24 13:38     ` Michal Simek
2014-09-22  9:13   ` [U-Boot] [PATCH 28/51] fpga: altera: Clean up altera_validate function Pavel Machek
2014-09-23 15:15 ` [U-Boot] [PATCH 00/51] arm: socfpga: Usability fixes Stefan Roese
2014-09-29 11:12 ` Pavel Machek
2014-09-29 22:54   ` Marek Vasut
2014-10-01  6:18 ` Chin Liang See
2014-10-01 11:13   ` Marek Vasut

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1412158247.11125.18.camel@clsee-VirtualBox.altera.com \
    --to=clsee@altera.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox