From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Date: Sat, 11 Oct 2014 16:51:20 +0100 Subject: [U-Boot] [PATCH 2/9] ARM: sunxi: Add sun8i (A23) UART0 pin mux support In-Reply-To: <1412665917-29731-3-git-send-email-wens@csie.org> References: <1412665917-29731-1-git-send-email-wens@csie.org> <1412665917-29731-3-git-send-email-wens@csie.org> Message-ID: <1413042680.11505.37.camel@hellion.org.uk> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote: > UART0 pin muxes on the A23 have a different function value. > > Signed-off-by: Chen-Yu Tsai Sigh, why can't silicon folks resist fiddling with stuff ;-) Acked-by: Ian Campbell > --- > arch/arm/include/asm/arch-sunxi/gpio.h | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h > index ba7e69b..b94ec4d 100644 > --- a/arch/arm/include/asm/arch-sunxi/gpio.h > +++ b/arch/arm/include/asm/arch-sunxi/gpio.h > @@ -125,8 +125,14 @@ enum sunxi_gpio_number { > #define SUNXI_GPF0_SDC0 2 > > #define SUNXI_GPF2_SDC0 2 > + > +#ifdef CONFIG_SUN8I > +#define SUNXI_GPF2_UART0_TX 3 > +#define SUNXI_GPF4_UART0_RX 3 > +#else > #define SUNXI_GPF2_UART0_TX 4 > #define SUNXI_GPF4_UART0_RX 4 > +#endif > > #define SUN4I_GPG0_SDC1 4 >