[U-Boot] [PATCH 3/9] ARM: sunxi: Add support for uart0 on port F (mmc0)

[Ian Campbell <ijc@hellion.org.uk>]

On Tue, 2014-10-07 at 15:11 +0800, Chen-Yu Tsai wrote:
> Allwinner SoCs provide uart0 muxed with mmc0, which can then be used
> with a micro SD breakout board. On the A23, this is the only way to
> use uart0.
> 
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Ian Campbell <ijc@hellion.org.uk>

> ---
>  arch/arm/cpu/armv7/sunxi/board.c | 11 ++++++++++-
>  include/configs/sunxi-common.h   |  2 ++
>  2 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
> index b6d63db..29d45b6 100644
> --- a/arch/arm/cpu/armv7/sunxi/board.c
> +++ b/arch/arm/cpu/armv7/sunxi/board.c
> @@ -50,7 +50,16 @@ u32 spl_boot_mode(void)
>  
>  int gpio_init(void)
>  {
> -#if CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I))
> +#if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
> +#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I)
> +	/* disable GPB22,23 as uart0 tx,rx to avoid conflict */
> +	sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT);
> +	sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT);
> +#endif
> +	sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUNXI_GPF2_UART0_TX);
> +	sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF4_UART0_RX);
> +	sunxi_gpio_set_pull(SUNXI_GPF(4), 1);
> +#elif CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I))
>  	sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
>  	sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
>  	sunxi_gpio_set_pull(SUNXI_GPB(23), SUNXI_GPIO_PULL_UP);
> diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
> index 7571e0e..7857a56 100644
> --- a/include/configs/sunxi-common.h
> +++ b/include/configs/sunxi-common.h
> @@ -77,6 +77,7 @@
>  #define CONFIG_INITRD_TAG
>  
>  /* mmc config */
> +#if !defined(CONFIG_UART0_PORT_F)
>  #define CONFIG_MMC
>  #define CONFIG_GENERIC_MMC
>  #define CONFIG_CMD_MMC
> @@ -84,6 +85,7 @@
>  #define CONFIG_MMC_SUNXI_SLOT		0
>  #define CONFIG_ENV_IS_IN_MMC
>  #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
> +#endif
>  
>  /* 4MB of malloc() pool */
>  #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (4 << 20))