From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ian Campbell <ijc@hellion.org.uk>
Date: Wed, 22 Oct 2014 19:07:51 +0100
Subject: [U-Boot] [PATCH v2 5/8] ARM: sunxi: Add support for R_PIO gpio
	banks
In-Reply-To: <1413967668-26334-6-git-send-email-wens@csie.org>
References: <1413967668-26334-1-git-send-email-wens@csie.org>
	<1413967668-26334-6-git-send-email-wens@csie.org>
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On Wed, 2014-10-22 at 16:47 +0800, Chen-Yu Tsai wrote:
> From: Hans de Goede <hdegoede@redhat.com>
> 
> The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO
> or R_PIO, which handles pin banks L and beyond.
> 
> Also add a clear description about SUNXI_GPIO_BANKS, stating it only
> counts the number of pin banks in the _main_ pin controller.
> 
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> [wens at csie.org: expanded commit message]
> [wens at csie.org: add pin bank M and expand comments]
> [wens at csie.org: add comment on SUNXI_GPIO_BANKS macro]
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Acked-by: Ian Campbell <ijc@hellion.org.uk>