From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 6/6] arm: socfpga: Add Designware (DW) SPI support to config header
Date: Fri, 7 Nov 2014 13:50:34 +0100 [thread overview]
Message-ID: <1415364634-8290-7-git-send-email-sr@denx.de> (raw)
In-Reply-To: <1415364634-8290-1-git-send-email-sr@denx.de>
Enable support for the DW master SPI controller in the config header
for the SoCFPGA. This controller can only be enabled, if DT support
is enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
---
include/configs/socfpga_common.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 9fc4212..830b956 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -191,6 +191,18 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_CMD_SF
#endif
+#ifdef CONFIG_OF_CONTROL /* DW SPI is controlled via DT */
+#define CONFIG_CMD_DM
+#define CONFIG_DM
+#define CONFIG_DM_SPI
+#define CONFIG_DESIGNWARE_SPI
+#ifndef __ASSEMBLY__
+unsigned int cm_get_spi_controller_clk_hz(void);
+#define CONFIG_DW_SPI_REF_CLK cm_get_spi_controller_clk_hz()
+#endif
+#define CONFIG_CMD_SPI
+#endif
+
/*
* Serial Driver
*/
--
2.1.3
next prev parent reply other threads:[~2014-11-07 12:50 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-07 12:50 [U-Boot] [PATCH 0/6] arm: socfpga: Add Designware SPI support Stefan Roese
2014-11-07 12:50 ` [U-Boot] [PATCH 1/6] arm: socfpga: Add DW master SPI clock to clock_manager.c Stefan Roese
2014-11-07 15:08 ` Marek Vasut
2014-11-12 17:41 ` Pavel Machek
2014-11-07 12:50 ` [U-Boot] [PATCH 2/6] arm: socfpga: Add socfpga_spim_enable() to reset_manager.c Stefan Roese
2014-11-12 17:42 ` Pavel Machek
2014-11-16 10:47 ` Stefan Roese
2014-11-07 12:50 ` [U-Boot] [PATCH 3/6] spi: Add designware master SPI DM driver used on SoCFPGA Stefan Roese
2014-11-07 15:12 ` Marek Vasut
2014-11-07 18:01 ` Simon Glass
2014-11-12 17:51 ` Pavel Machek
2014-11-14 20:16 ` Marek Vasut
2014-11-15 13:33 ` Stefan Roese
2014-11-15 14:40 ` Marek Vasut
2014-11-07 12:50 ` [U-Boot] [PATCH 4/6] arm: socfpga: dts: Add spi0/1 dts nodes for the Designware master SPI devices Stefan Roese
2014-11-12 17:52 ` Pavel Machek
2014-11-07 12:50 ` [U-Boot] [PATCH 5/6] arm: socfpga: dts: socrates: Add spi1/2 aliases needed DM SPI probing Stefan Roese
2014-11-12 17:52 ` Pavel Machek
2014-11-07 12:50 ` Stefan Roese [this message]
2014-11-12 17:53 ` [U-Boot] [PATCH 6/6] arm: socfpga: Add Designware (DW) SPI support to config header Pavel Machek
2014-11-14 20:18 ` Marek Vasut
2014-11-15 13:35 ` Stefan Roese
2014-11-15 14:40 ` Marek Vasut
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