From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Date: Sun, 16 Nov 2014 11:27:31 +0000 Subject: [U-Boot] [PATCH 1/6] sun4i: Rename dram_clk_cfg to dram_clk_gate In-Reply-To: <1415984088-6800-2-git-send-email-hdegoede@redhat.com> References: <1415984088-6800-1-git-send-email-hdegoede@redhat.com> <1415984088-6800-2-git-send-email-hdegoede@redhat.com> Message-ID: <1416137251.25454.5.camel@hellion.org.uk> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Fri, 2014-11-14 at 17:54 +0100, Hans de Goede wrote: > The data sheet just calls it DRAM_CLK_REG, and on sun6i we've both a > dram_clk_cfg and dram_clk_gate, and the sun4i reg matches dram_clk_gate on > sun6i, so name it the same on sun4i. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell > --- > arch/arm/cpu/armv7/sunxi/dram_sun4i.c | 4 ++-- > arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/cpu/armv7/sunxi/dram_sun4i.c b/arch/arm/cpu/armv7/sunxi/dram_sun4i.c > index dc9fdb9..ec8aaa7 100644 > --- a/arch/arm/cpu/armv7/sunxi/dram_sun4i.c > +++ b/arch/arm/cpu/armv7/sunxi/dram_sun4i.c > @@ -428,9 +428,9 @@ static void dramc_clock_output_en(u32 on) > #ifdef CONFIG_MACH_SUN4I > struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; > if (on) > - setbits_le32(&ccm->dram_clk_cfg, CCM_DRAM_CTRL_DCLK_OUT); > + setbits_le32(&ccm->dram_clk_gate, CCM_DRAM_CTRL_DCLK_OUT); > else > - clrbits_le32(&ccm->dram_clk_cfg, CCM_DRAM_CTRL_DCLK_OUT); > + clrbits_le32(&ccm->dram_clk_gate, CCM_DRAM_CTRL_DCLK_OUT); > #endif > } > > diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h > index 9dca800..6c0430c 100644 > --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h > +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h > @@ -62,7 +62,7 @@ struct sunxi_ccm_reg { > u32 gps_clk_cfg; /* 0xd0 */ > u32 spi3_clk_cfg; /* 0xd4 */ > u8 res5[0x28]; > - u32 dram_clk_cfg; /* 0x100 */ > + u32 dram_clk_gate; /* 0x100 */ > u32 be0_clk_cfg; /* 0x104 */ > u32 be1_clk_cfg; /* 0x108 */ > u32 fe0_clk_cfg; /* 0x10c */