From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Date: Mon, 08 Dec 2014 09:28:27 +0000 Subject: [U-Boot] [PATCH 2/2] sunxi: mmc: Properly setup mod-clk and clock sampling phases In-Reply-To: <1417983799-13912-2-git-send-email-hdegoede@redhat.com> References: <1417983799-13912-1-git-send-email-hdegoede@redhat.com> <1417983799-13912-2-git-send-email-hdegoede@redhat.com> Message-ID: <1418030907.11028.2.camel@hellion.org.uk> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Sun, 2014-12-07 at 21:23 +0100, Hans de Goede wrote: > The sunxi mmc controller has both an internal clock divider, as well as > the divider in the mod0-clk for the mmc controller. > > The internal divider cannot be used, as it conflicts with the setting of > clock sampling phases which is done in the mod0-clk, so it must be set to > 0 (divide by 1). > > For some reason while the kernel has had this correct from day one, the > u-boot sunxi mmc code has been using a fixed mod0-clk and setting its > internal divider depending on the desired speed. This is something which > we've inherited from the original Allwinner u-boot sources, but while this > has been fixed in Allwinner's own u-boot code at least for the A23 and later > upstream u-boot was still doing this wrong. > > This commit fixes this, thereby also fixing mmc support not working reliable > on the A23 (which seems more sensitive to this) and possible also fixes some > other sunxi mmc issues. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell