[U-Boot] [PATCH 08/17] sunxi: video: Move sunxi_drc_init

Hans de Goede
2014-12-25T10:22:07Z

Hi,

On 25-12-14 10:08, Chen-Yu Tsai wrote:
> On Thu, Dec 25, 2014 at 3:06 AM, Hans de Goede <hdegoede@redhat.com> wrote:
>> Move sunxi_drc_init to directly above sunxi_engines_init, to avoid unnecessary
>
> Unfinished commit message?

Sortof the next line read:

#ifdef-ery in later patches.

But git commit acted on the # and treated the line as a comment, and I did not
notice this until you pointed it out.

I'll amend the commit message in my personal tree.

Regards,

Hans

>
> ChenYu
>
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> ---
>> drivers/video/sunxi_display.c | 26 ++++++++++++--------------
>> 1 file changed, 12 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c
>> index aed6ae6..ea7548b 100644
>> --- a/drivers/video/sunxi_display.c
>> +++ b/drivers/video/sunxi_display.c
>> @@ -472,18 +472,6 @@ static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode,
>> sunxi_lcdc_pll_set(1, mode->pixclock_khz, clk_div, clk_double);
>> }
>>
>> -#ifdef CONFIG_MACH_SUN6I
>> -static void sunxi_drc_init(void)
>> -{
>> - struct sunxi_ccm_reg * const ccm =
>> - (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
>> -
>> - /* On sun6i the drc must be clocked even when in pass-through mode */
>> - setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DRC0);
>> - clock_set_de_mod_clock(&ccm->iep_drc0_clk_cfg, 300000000);
>> -}
>> -#endif
>> -
>> static void sunxi_hdmi_setup_info_frames(const struct ctfb_res_modes *mode)
>> {
>> struct sunxi_hdmi_reg * const hdmi =
>> @@ -592,13 +580,23 @@ static void sunxi_hdmi_enable(void)
>> setbits_le32(&hdmi->video_ctrl, SUNXI_HDMI_VIDEO_CTRL_ENABLE);
>> }
>>
>> +static void sunxi_drc_init(void)
>> +{
>> +#ifdef CONFIG_MACH_SUN6I
>> + struct sunxi_ccm_reg * const ccm =
>> + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
>> +
>> + /* On sun6i the drc must be clocked even when in pass-through mode */
>> + setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_DRC0);
>> + clock_set_de_mod_clock(&ccm->iep_drc0_clk_cfg, 300000000);
>> +#endif
>> +}
>> +
>> static void sunxi_engines_init(void)
>> {
>> sunxi_composer_init();
>> sunxi_lcdc_init();
>> -#ifdef CONFIG_MACH_SUN6I
>> sunxi_drc_init();
>> -#endif
>> }
>>
>> static void sunxi_mode_set(const struct ctfb_res_modes *mode,
>> --
>> 2.1.0
>>
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