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From: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
To: u-boot@lists.denx.de
Subject: [U-Boot] Odroid XU3 - exynos5422 - SPL - iRAM/sRAM address
Date: Tue, 20 Jan 2015 17:40:07 +0100	[thread overview]
Message-ID: <1421772007.6818.42.camel@collabora.co.uk> (raw)
In-Reply-To: <1421746560.6818.37.camel@collabora.co.uk>

(Corrected the u-boot list address in the cc of this thread and added
 Kevin hilman who is also quite interested in this topic)

On Tue, 2015-01-20 at 10:36 +0100, Sjoerd Simons wrote:
> Hey Suriyan,
> 
> I just noticed the patchset Akshay Saraswat sent (Add support for
> booting multiple cores), which would hopefully fix  some issues wrt.
> booting secondary cores we've seen on the XU3 thusfar. Unfortunately,
> those fixes need to be applied in the SPL stage, hence coming back to
> the BL2 story :). Any updates you can share?
> 
> Separately i do wonder if getting a (very basic?) signed BL2 to
> chainload an unsigned SPL might not be the best way forward here. Would
> allow us to fix SPL issues in u-boot without having to ask hardkernel to
> sign every time ? :/ 
> 
> 
> On Fri, 2014-12-19 at 15:45 -0800, Suriyan Ramasami wrote:
> > Just to close the loop.
> > 
> > For the XU3, scanning memory, I found the signed BL2 loaded at address
> > 0x02027000.
> > Regards
> > - Suriyan
> > 
> > PS: Any pointers with regards to mem_ctrl_init() is appreciated.
> > 
> > On Fri, Dec 19, 2014 at 12:43 PM, Suriyan Ramasami <suriyan.r@gmail.com> wrote:
> > > Hello All,
> > >     Greetings!
> > >
> > >     I have been dabbling with trying to get mainline SPL working on
> > > the Odroid XU3. The issue that I am facing is that currently I do not
> > > know what address the BL1 loads and passes control to the SPL (signed
> > > BL2).
> > >     Of course, I could get another SPL signed from Hard kernel and
> > > have the address written out in some memory address, but I thought if
> > > someone has access to the documents it might be faster to get this
> > > information.
> > >
> > > As an update ...
> > >     So far, I have successfully gotten an Hardkernel based SPL to
> > > chain load an unsigned SPL from mainline. I am hitting some issues in
> > > mem_ctrl_init() or so I think. I was wondering if the issues were
> > > cause of it being initialized twice (one from the signed BL2) and the
> > > other from the mainline SPL that is chain loaded.
> > >
> > > Thanks
> > > - Suriyan
> 
> 


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       reply	other threads:[~2015-01-20 16:40 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CANoR_OBusZCF1cRFhrTem1hh86pJpGOFU-u2Jw+MGfAHi1sxXQ@mail.gmail.com>
     [not found] ` <CANoR_OCPauSqFZqos48wBPXjBSu1triHC1ftXko6Rs3y-jaWVg@mail.gmail.com>
     [not found]   ` <1421746560.6818.37.camel@collabora.co.uk>
2015-01-20 16:40     ` Sjoerd Simons [this message]
2015-01-20 19:37       ` [U-Boot] Odroid XU3 - exynos5422 - SPL - iRAM/sRAM address Suriyan Ramasami
2015-01-20 21:30         ` Kevin Hilman
2015-01-20 22:06           ` Suriyan Ramasami
2015-01-20 22:43             ` Kevin Hilman
2015-01-20 23:29               ` Suriyan Ramasami
2015-01-20 23:38                 ` Suriyan Ramasami
2015-01-21  0:19                   ` Suriyan Ramasami
2015-01-21 19:01                   ` Kevin Hilman
2015-01-21  9:54                 ` Sjoerd Simons
2015-01-22  0:54         ` Kevin Hilman
2015-01-22  5:54           ` Suriyan Ramasami
2015-01-22 17:51             ` Kevin Hilman
2015-01-23  1:46               ` Suriyan Ramasami
2015-01-28  7:17                 ` Joonyoung Shim
2015-02-25 21:38                 ` Kevin Hilman
2015-02-25 23:00                   ` Suriyan Ramasami

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